[igt-dev] [PATCH i-g-t] test/gem_exec_schedule: Fix variable shadow warning
José Roberto de Souza
jose.souza at intel.com
Fri Apr 5 00:27:38 UTC 2019
Although it is not causing any bug, lets get rid of this warning by
adding the iter parameter to for_each_physical_engine().
[313/558] Compiling C object 'tests/59830eb@@gem_exec_schedule at exe/i915_gem_exec_schedule.c.o'.
In file included from ../lib/igt.h:40,
from ../tests/i915/gem_exec_schedule.c:31:
../tests/i915/gem_exec_schedule.c: In function ‘measure_semaphore_power’:
../lib/igt_gt.h:84:44: warning: declaration of ‘e__’ shadows a previous local [-Wshadow]
for (const struct intel_execution_engine *e__ = intel_execution_engines;\
^~~
../tests/i915/gem_exec_schedule.c:1316:3: note: in expansion of macro ‘for_each_physical_engine’
for_each_physical_engine(i915, engine) {
^~~~~~~~~~~~~~~~~~~~~~~~
../lib/igt_gt.h:84:44: note: shadowed declaration is here
for (const struct intel_execution_engine *e__ = intel_execution_engines;\
^~~
../tests/i915/gem_exec_schedule.c:1297:2: note: in expansion of macro ‘for_each_physical_engine’
for_each_physical_engine(i915, signaler) {
^~~~~~~~~~~~~~~~~~~~~~~~
Fixes: 8c69d24ebef3 ("i915/gem_exec_schedule: Measure semaphore power consumption")
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
---
lib/i915/gem_ring.c | 3 +-
lib/i915/gem_submission.c | 4 ++-
lib/igt_dummyload.c | 3 +-
lib/igt_gt.h | 10 +++---
tests/amdgpu/amd_prime.c | 3 +-
tests/i915/gem_busy.c | 6 ++--
tests/i915/gem_concurrent_all.c | 3 +-
tests/i915/gem_ctx_create.c | 3 +-
tests/i915/gem_ctx_switch.c | 5 +--
tests/i915/gem_ctx_thrash.c | 6 ++--
tests/i915/gem_exec_async.c | 3 +-
tests/i915/gem_exec_await.c | 3 +-
tests/i915/gem_exec_create.c | 3 +-
tests/i915/gem_exec_fence.c | 9 ++++--
tests/i915/gem_exec_gttfill.c | 3 +-
tests/i915/gem_exec_latency.c | 10 +++---
tests/i915/gem_exec_nop.c | 24 +++++++++------
tests/i915/gem_exec_parallel.c | 4 ++-
tests/i915/gem_exec_reloc.c | 4 ++-
tests/i915/gem_exec_schedule.c | 42 ++++++++++++++++---------
tests/i915/gem_exec_store.c | 3 +-
tests/i915/gem_exec_suspend.c | 7 +++--
tests/i915/gem_exec_whisper.c | 4 ++-
tests/i915/gem_ring_sync_loop.c | 3 +-
tests/i915/gem_spin_batch.c | 3 +-
tests/i915/gem_sync.c | 54 ++++++++++++++++++++++-----------
26 files changed, 148 insertions(+), 77 deletions(-)
diff --git a/lib/i915/gem_ring.c b/lib/i915/gem_ring.c
index fdb9fc1b..e22015bf 100644
--- a/lib/i915/gem_ring.c
+++ b/lib/i915/gem_ring.c
@@ -140,9 +140,10 @@ unsigned int
gem_measure_ring_inflight(int fd, unsigned int engine, enum measure_ring_flags flags)
{
if (engine == ALL_ENGINES) {
+ const struct intel_execution_engine *exec_engine_iter;
unsigned int global_min = ~0u;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
unsigned int engine_min = __gem_measure_ring_inflight(fd, engine, flags);
if (engine_min < global_min)
diff --git a/lib/i915/gem_submission.c b/lib/i915/gem_submission.c
index 2fd460d5..db1df8c9 100644
--- a/lib/i915/gem_submission.c
+++ b/lib/i915/gem_submission.c
@@ -215,7 +215,9 @@ void gem_test_engine(int i915, unsigned int engine)
gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
if (engine == ALL_ENGINES) {
- for_each_physical_engine(i915, engine) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(i915, exec_engine_iter, engine) {
execbuf.flags = engine;
gem_execbuf(i915, &execbuf);
}
diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 47f6b92b..a68f6948 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -94,9 +94,10 @@ emit_recursive_batch(igt_spin_t *spin,
nengine = 0;
if (opts->engine == ALL_ENGINES) {
+ const struct intel_execution_engine *exec_engine_iter;
unsigned int engine;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (opts->flags & IGT_SPIN_POLL_RUN &&
!gem_can_store_dword(fd, engine))
continue;
diff --git a/lib/igt_gt.h b/lib/igt_gt.h
index 54e95da9..94b56b01 100644
--- a/lib/igt_gt.h
+++ b/lib/igt_gt.h
@@ -80,11 +80,11 @@ extern const struct intel_execution_engine {
e__++) \
for_if (gem_has_ring(fd__, flags__ = e__->exec_id | e__->flags))
-#define for_each_physical_engine(fd__, flags__) \
- for (const struct intel_execution_engine *e__ = intel_execution_engines;\
- e__->name; \
- e__++) \
- for_if (gem_ring_has_physical_engine(fd__, flags__ = e__->exec_id | e__->flags))
+#define for_each_physical_engine(fd__, iter, flags__) \
+ for (iter = intel_execution_engines;\
+ iter->name; \
+ iter++) \
+ for_if (gem_ring_has_physical_engine(fd__, flags__ = iter->exec_id | iter->flags))
bool gem_ring_is_physical_engine(int fd, unsigned int ring);
bool gem_ring_has_physical_engine(int fd, unsigned int ring);
diff --git a/tests/amdgpu/amd_prime.c b/tests/amdgpu/amd_prime.c
index dc71ac70..f151a8ac 100644
--- a/tests/amdgpu/amd_prime.c
+++ b/tests/amdgpu/amd_prime.c
@@ -170,6 +170,7 @@ static void unplug(struct cork *c)
static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
{
+ const struct intel_execution_engine *exec_engine_iter;
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_execbuffer2 execbuf;
@@ -179,7 +180,7 @@ static void i915_to_amd(int i915, int amd, amdgpu_device_handle device)
struct cork c;
nengine = 0;
- for_each_physical_engine(i915, engine)
+ for_each_physical_engine(i915, exec_engine_iter, engine)
engines[nengine++] = engine;
igt_require(nengine);
diff --git a/tests/i915/gem_busy.c b/tests/i915/gem_busy.c
index ad853468..db3583c3 100644
--- a/tests/i915/gem_busy.c
+++ b/tests/i915/gem_busy.c
@@ -263,16 +263,18 @@ static void one(int fd, unsigned ring, unsigned test_flags)
__gem_busy(fd, obj[BATCH].handle, &read[BATCH], &write[BATCH]);
if (test_flags & PARALLEL) {
+ const struct intel_execution_engine *exec_engine_iter;
unsigned other;
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
if (other == ring)
continue;
if (!gem_can_store_dword(fd, other))
continue;
- igt_debug("Testing %s in parallel\n", e__->name);
+ igt_debug("Testing %s in parallel\n",
+ exec_engine_iter->name);
one(fd, other, 0);
}
}
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 6049372d..03274b0b 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -949,9 +949,10 @@ static igt_hang_t rcs_hang(void)
static igt_hang_t all_hang(void)
{
igt_hang_t hang = igt_hang_ring(fd, I915_EXEC_RENDER);
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engine;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
struct drm_i915_gem_execbuffer2 eb = hang.spin->execbuf;
if (engine == I915_EXEC_RENDER)
diff --git a/tests/i915/gem_ctx_create.c b/tests/i915/gem_ctx_create.c
index a664070d..9b098fd7 100644
--- a/tests/i915/gem_ctx_create.c
+++ b/tests/i915/gem_ctx_create.c
@@ -315,13 +315,14 @@ igt_main
int fd = -1;
igt_fixture {
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engine;
fd = drm_open_driver(DRIVER_INTEL);
igt_require_gem(fd);
gem_require_contexts(fd);
- for_each_physical_engine(fd, engine)
+ for_each_physical_engine(fd, exec_engine_iter, engine)
all_engines[all_nengine++] = engine;
igt_require(all_nengine);
diff --git a/tests/i915/gem_ctx_switch.c b/tests/i915/gem_ctx_switch.c
index 87e13b91..b525e18b 100644
--- a/tests/i915/gem_ctx_switch.c
+++ b/tests/i915/gem_ctx_switch.c
@@ -216,6 +216,7 @@ static void single(int fd, uint32_t handle,
static void all(int fd, uint32_t handle, unsigned flags, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj[2];
unsigned int engine[16], e;
@@ -225,9 +226,9 @@ static void all(int fd, uint32_t handle, unsigned flags, int timeout)
int n, qlen;
nengine = 0;
- for_each_physical_engine(fd, e) {
+ for_each_physical_engine(fd, exec_engine_iter, e) {
engine[nengine] = e;
- name[nengine] = e__->name;
+ name[nengine] = exec_engine_iter->name;
nengine++;
}
igt_require(nengine);
diff --git a/tests/i915/gem_ctx_thrash.c b/tests/i915/gem_ctx_thrash.c
index b25f95f1..09310408 100644
--- a/tests/i915/gem_ctx_thrash.c
+++ b/tests/i915/gem_ctx_thrash.c
@@ -103,9 +103,10 @@ static void single(const char *name, bool all_engines)
num_engines = 0;
if (all_engines) {
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engine;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (!gem_can_store_dword(fd, engine))
continue;
@@ -220,6 +221,7 @@ static void single(const char *name, bool all_engines)
static void processes(void)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engines[16], engine;
int num_engines;
struct rlimit rlim;
@@ -230,7 +232,7 @@ static void processes(void)
fd = drm_open_driver(DRIVER_INTEL);
num_engines = 0;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
engines[num_engines++] = engine;
if (num_engines == ARRAY_SIZE(engines))
break;
diff --git a/tests/i915/gem_exec_async.c b/tests/i915/gem_exec_async.c
index 9a06af7e..d3a64bdc 100644
--- a/tests/i915/gem_exec_async.c
+++ b/tests/i915/gem_exec_async.c
@@ -82,6 +82,7 @@ static void store_dword(int fd, unsigned ring,
static void one(int fd, unsigned ring, uint32_t flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[2];
#define SCRATCH 0
@@ -143,7 +144,7 @@ static void one(int fd, unsigned ring, uint32_t flags)
gem_close(fd, obj[BATCH].handle);
i = 0;
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
if (other == ring)
continue;
diff --git a/tests/i915/gem_exec_await.c b/tests/i915/gem_exec_await.c
index 5cfeb8ec..380396a4 100644
--- a/tests/i915/gem_exec_await.c
+++ b/tests/i915/gem_exec_await.c
@@ -62,6 +62,7 @@ static void xchg_obj(void *array, unsigned i, unsigned j)
#define CONTEXTS 0x1
static void wide(int fd, int ring_size, int timeout, unsigned int flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
const uint32_t bbe = MI_BATCH_BUFFER_END;
const int gen = intel_gen(intel_get_drm_devid(fd));
struct {
@@ -79,7 +80,7 @@ static void wide(int fd, int ring_size, int timeout, unsigned int flags)
double time;
nengine = 0;
- for_each_physical_engine(fd, engine)
+ for_each_physical_engine(fd, exec_engine_iter, engine)
engines[nengine++] = engine;
igt_require(nengine);
diff --git a/tests/i915/gem_exec_create.c b/tests/i915/gem_exec_create.c
index 54a2429e..78d66c07 100644
--- a/tests/i915/gem_exec_create.c
+++ b/tests/i915/gem_exec_create.c
@@ -58,6 +58,7 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
static void all(int fd, unsigned flags, int timeout, int ncpus)
{
+ const struct intel_execution_engine *exec_engine_iter;
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
@@ -66,7 +67,7 @@ static void all(int fd, unsigned flags, int timeout, int ncpus)
unsigned engine;
nengine = 0;
- for_each_physical_engine(fd, engine)
+ for_each_physical_engine(fd, exec_engine_iter, engine)
engines[nengine++] = engine;
igt_require(nengine);
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index ba46595d..e849daef 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -317,6 +317,7 @@ static void test_fence_busy_all(int fd, unsigned flags)
static void test_fence_await(int fd, unsigned ring, unsigned flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj;
struct drm_i915_gem_relocation_entry reloc;
@@ -381,7 +382,7 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
igt_assert(fence != -1);
i = 0;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (!gem_can_store_dword(fd, engine))
continue;
@@ -447,6 +448,7 @@ static int __execbuf(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
static void test_parallel(int fd, unsigned int master)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int SCRATCH = 0;
const int BATCH = 1;
const int gen = intel_gen(intel_get_drm_devid(fd));
@@ -544,7 +546,7 @@ static void test_parallel(int fd, unsigned int master)
obj[BATCH].relocation_count = 1;
/* Queue all secondaries */
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (engine == master)
continue;
@@ -705,6 +707,7 @@ static void test_keep_in_fence(int fd, unsigned int engine, unsigned int flags)
#define EXPIRED 0x10000
static void test_long_history(int fd, long ring_size, unsigned flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
const uint32_t sz = 1 << 20;
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_exec_object2 obj[2];
@@ -720,7 +723,7 @@ static void test_long_history(int fd, long ring_size, unsigned flags)
limit = ring_size / 3;
nengine = 0;
- for_each_physical_engine(fd, engine)
+ for_each_physical_engine(fd, exec_engine_iter, engine)
engines[nengine++] = engine;
igt_require(nengine);
diff --git a/tests/i915/gem_exec_gttfill.c b/tests/i915/gem_exec_gttfill.c
index efd612bb..605de6ba 100644
--- a/tests/i915/gem_exec_gttfill.c
+++ b/tests/i915/gem_exec_gttfill.c
@@ -106,6 +106,7 @@ static void submit(int fd, int gen,
static void fillgtt(int fd, unsigned ring, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_relocation_entry reloc[2];
@@ -122,7 +123,7 @@ static void fillgtt(int fd, unsigned ring, int timeout)
nengine = 0;
if (ring == 0) {
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (!gem_can_store_dword(fd, engine))
continue;
diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index 39f441d2..002d9060 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -263,6 +263,7 @@ static void latency_from_ring(int fd,
unsigned ring, const char *name,
unsigned flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
const int has_64bit_reloc = gen >= 8;
struct drm_i915_gem_exec_object2 obj[3];
@@ -315,7 +316,7 @@ static void latency_from_ring(int fd,
reloc.presumed_offset = obj[1].offset;
reloc.target_handle = flags & CORK ? 1 : 0;
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
igt_spin_t *spin = NULL;
IGT_CORK_HANDLE(c);
@@ -396,7 +397,7 @@ static void latency_from_ring(int fd,
igt_spin_batch_free(fd, spin);
igt_info("%s-%s delay: %.2fns\n",
- name, e__->name,
+ name, exec_engine_iter->name,
(results[2*repeats-1] - results[0]) / (double)repeats * rcs_clock);
}
@@ -457,6 +458,7 @@ static void
rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned int flags)
#define RTIDLE 0x1
{
+ const struct intel_execution_engine *exec_engine_iter;
const char *passname[] = {
"warmup",
"normal",
@@ -486,12 +488,12 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
nengine = 0;
if (engine == ALL_ENGINES) {
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (!gem_can_store_dword(fd, engine))
continue;
engines[nengine] = engine;
- names[nengine] = e__->name;
+ names[nengine] = exec_engine_iter->name;
nengine++;
}
igt_require(nengine > 1);
diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index b91b4d0f..7ed6dcf2 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -216,6 +216,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
static void poll_sequential(int fd, const char *name, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
const uint32_t MI_ARB_CHK = 0x5 << 23;
struct drm_i915_gem_execbuffer2 execbuf;
@@ -233,7 +234,7 @@ static void poll_sequential(int fd, const char *name, int timeout)
flags |= I915_EXEC_SECURE;
nengine = 0;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (!gem_can_store_dword(fd, engine))
continue;
@@ -427,6 +428,7 @@ static void headless(int fd, uint32_t handle)
static void parallel(int fd, uint32_t handle, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
unsigned engines[16];
@@ -438,14 +440,14 @@ static void parallel(int fd, uint32_t handle, int timeout)
sum = 0;
nengine = 0;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
engines[nengine] = engine;
- names[nengine] = e__->name;
+ names[nengine] = exec_engine_iter->name;
nengine++;
time = nop_on_ring(fd, handle, engine, 1, &count) / count;
sum += time;
- igt_debug("%s: %.3fus\n", e__->name, 1e6*time);
+ igt_debug("%s: %.3fus\n", exec_engine_iter->name, 1e6*time);
}
igt_require(nengine);
igt_info("average (individually): %.3fus\n", sum/nengine*1e6);
@@ -489,6 +491,7 @@ static void parallel(int fd, uint32_t handle, int timeout)
static void series(int fd, uint32_t handle, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
struct timespec start, now, sync;
@@ -500,10 +503,10 @@ static void series(int fd, uint32_t handle, int timeout)
const char *name;
nengine = 0;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
time = nop_on_ring(fd, handle, engine, 1, &count) / count;
if (time > max) {
- name = e__->name;
+ name = exec_engine_iter->name;
max = time;
}
if (time < min)
@@ -579,6 +582,7 @@ static void xchg(void *array, unsigned i, unsigned j)
static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj[2];
@@ -595,12 +599,12 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
nengine = 0;
sum = 0;
- for_each_physical_engine(fd, n) {
+ for_each_physical_engine(fd, exec_engine_iter, n) {
unsigned long count;
time = nop_on_ring(fd, handle, n, 1, &count) / count;
sum += time;
- igt_debug("%s: %.3fus\n", e__->name, 1e6*time);
+ igt_debug("%s: %.3fus\n", exec_engine_iter->name, 1e6*time);
engines[nengine++] = n;
}
@@ -726,7 +730,9 @@ static void fence_signal(int fd, uint32_t handle,
nengine = 0;
if (ring_id == ALL_ENGINES) {
- for_each_physical_engine(fd, n)
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, n)
engines[nengine++] = n;
} else {
gem_require_ring(fd, ring_id);
diff --git a/tests/i915/gem_exec_parallel.c b/tests/i915/gem_exec_parallel.c
index a6fa698e..ee74a18b 100644
--- a/tests/i915/gem_exec_parallel.c
+++ b/tests/i915/gem_exec_parallel.c
@@ -169,7 +169,9 @@ static void all(int fd, unsigned engine, unsigned flags)
nengine = 0;
if (engine == ALL_ENGINES) {
- for_each_physical_engine(fd, engine) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (gem_can_store_dword(fd, engine))
engines[nengine++] = engine;
}
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 837f60a6..0263d7dd 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -258,7 +258,9 @@ static void active(int fd, unsigned engine)
nengine = 0;
if (engine == ALL_ENGINES) {
- for_each_physical_engine(fd, engine) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (gem_can_store_dword(fd, engine))
engines[nengine++] = engine;
}
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 3df319bc..8c61475d 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -199,6 +199,7 @@ static void fifo(int fd, unsigned ring)
static void independent(int fd, unsigned int engine)
{
IGT_CORK_HANDLE(cork);
+ const struct intel_execution_engine *exec_engine_iter;
uint32_t scratch, plug, batch;
igt_spin_t *spin = NULL;
unsigned int other;
@@ -213,7 +214,7 @@ static void independent(int fd, unsigned int engine)
plug = igt_cork_plug(&cork, fd);
/* Check that we can submit to engine while all others are blocked */
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
if (other == engine)
continue;
@@ -275,7 +276,9 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
nengine = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, engine)
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, engine)
engines[nengine++] = engine;
} else {
engines[nengine++] = ring;
@@ -342,6 +345,7 @@ static uint32_t batch_create(int i915)
static void semaphore_userlock(int i915)
{
+ const struct intel_execution_engine *exec_engine_iter;
struct drm_i915_gem_exec_object2 obj = {
.handle = batch_create(i915),
};
@@ -359,7 +363,7 @@ static void semaphore_userlock(int i915)
*/
scratch = gem_create(i915, 4096);
- for_each_physical_engine(i915, engine) {
+ for_each_physical_engine(i915, exec_engine_iter, engine) {
if (!spin) {
spin = igt_spin_batch_new(i915,
.dependency = scratch,
@@ -384,7 +388,7 @@ static void semaphore_userlock(int i915)
* taking precedence.
*/
scratch = gem_context_create(i915);
- for_each_physical_engine(i915, engine) {
+ for_each_physical_engine(i915, exec_engine_iter, engine) {
struct drm_i915_gem_execbuffer2 execbuf = {
.buffers_ptr = to_user_pointer(&obj),
.buffer_count = 1,
@@ -549,11 +553,12 @@ static void preempt(int fd, unsigned ring, unsigned flags)
static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned other;
gem_context_set_priority(fd, ctx, prio);
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
if (spin == NULL) {
spin = __igt_spin_batch_new(fd,
.ctx = ctx,
@@ -591,7 +596,9 @@ static void __preempt_other(int fd,
n++;
if (flags & CHAIN) {
- for_each_physical_engine(fd, other) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, other) {
store_dword(fd, ctx[LO], other,
result, (n + 1)*sizeof(uint32_t), n + 1,
0, I915_GEM_DOMAIN_RENDER);
@@ -617,6 +624,7 @@ static void __preempt_other(int fd,
static void preempt_other(int fd, unsigned ring, unsigned int flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned int primary;
igt_spin_t *spin = NULL;
uint32_t ctx[3];
@@ -640,8 +648,8 @@ static void preempt_other(int fd, unsigned ring, unsigned int flags)
ctx[HI] = gem_context_create(fd);
gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
- for_each_physical_engine(fd, primary) {
- igt_debug("Primary engine: %s\n", e__->name);
+ for_each_physical_engine(fd, exec_engine_iter, primary) {
+ igt_debug("Primary engine: %s\n", exec_engine_iter->name);
__preempt_other(fd, ctx, ring, primary, flags);
}
@@ -696,7 +704,9 @@ static void __preempt_queue(int fd,
n++;
if (flags & CHAIN) {
- for_each_physical_engine(fd, other) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, other) {
store_dword(fd, ctx[LO], other,
result, (n + 1)*sizeof(uint32_t), n + 1,
0, I915_GEM_DOMAIN_RENDER);
@@ -737,9 +747,10 @@ static void __preempt_queue(int fd,
static void preempt_queue(int fd, unsigned ring, unsigned int flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned other;
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
for (unsigned depth = 0; depth <= MAX_ELSP_QLEN; depth++)
__preempt_queue(fd, ring, other, depth, flags);
}
@@ -747,6 +758,7 @@ static void preempt_queue(int fd, unsigned ring, unsigned int flags)
static void preempt_self(int fd, unsigned ring)
{
+ const struct intel_execution_engine *exec_engine_iter;
uint32_t result = gem_create(fd, 4096);
uint32_t result_read[4096 / sizeof(uint32_t)];
igt_spin_t *spin[MAX_ELSP_QLEN];
@@ -768,7 +780,7 @@ static void preempt_self(int fd, unsigned ring)
n = 0;
gem_context_set_priority(fd, ctx[HI], MIN_PRIO);
- for_each_physical_engine(fd, other) {
+ for_each_physical_engine(fd, exec_engine_iter, other) {
spin[n] = __igt_spin_batch_new(fd,
.ctx = ctx[NOISE],
.engine = other);
@@ -1289,12 +1301,14 @@ static void test_pi_ringfull(int fd, unsigned int engine)
static void measure_semaphore_power(int i915)
{
+ const struct intel_execution_engine *exec_engine_iter;
struct gpu_power power;
unsigned int engine, signaler;
igt_require(gpu_power_open(&power) == 0);
- for_each_physical_engine(i915, signaler) {
+ for_each_physical_engine(i915, exec_engine_iter, signaler) {
+ const struct intel_execution_engine *exec_engine_iter2;
struct gpu_power_sample s_spin[2];
struct gpu_power_sample s_sema[2];
double baseline, total;
@@ -1313,7 +1327,7 @@ static void measure_semaphore_power(int i915)
gpu_power_read(&power, &s_spin[1]);
/* Add a waiter to each engine */
- for_each_physical_engine(i915, engine) {
+ for_each_physical_engine(i915, exec_engine_iter2, engine) {
igt_spin_t *sema;
if (engine == signaler)
@@ -1337,7 +1351,7 @@ static void measure_semaphore_power(int i915)
total = gpu_power_W(&power, &s_sema[0], &s_sema[1]);
igt_info("%s: %.1fmW + %.1fmW (total %1.fmW)\n",
- e__->name,
+ exec_engine_iter->name,
1e3 * baseline,
1e3 * (total - baseline),
1e3 * total);
diff --git a/tests/i915/gem_exec_store.c b/tests/i915/gem_exec_store.c
index a7673489..fb916e0a 100644
--- a/tests/i915/gem_exec_store.c
+++ b/tests/i915/gem_exec_store.c
@@ -178,6 +178,7 @@ static void store_cachelines(int fd, unsigned ring, unsigned int flags)
static void store_all(int fd)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_relocation_entry reloc[32];
@@ -220,7 +221,7 @@ static void store_all(int fd)
nengine = 0;
intel_detect_and_clear_missed_interrupts(fd);
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (!gem_can_store_dword(fd, engine))
continue;
diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
index 43c52d10..d7795251 100644
--- a/tests/i915/gem_exec_suspend.c
+++ b/tests/i915/gem_exec_suspend.c
@@ -64,9 +64,10 @@ static void check_bo(int fd, uint32_t handle)
static void test_all(int fd, unsigned flags)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engine;
- for_each_physical_engine(fd, engine)
+ for_each_physical_engine(fd, exec_engine_iter, engine)
if (gem_can_store_dword(fd, engine))
run_test(fd, engine, flags & ~0xff);
}
@@ -106,7 +107,9 @@ static void run_test(int fd, unsigned engine, unsigned flags)
* GPU is then unlikely to be active!)
*/
if (has_semaphores(fd)) {
- for_each_physical_engine(fd, engine) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (gem_can_store_dword(fd, engine))
engines[nengine++] = engine;
}
diff --git a/tests/i915/gem_exec_whisper.c b/tests/i915/gem_exec_whisper.c
index 6c3b5375..b7e88c98 100644
--- a/tests/i915/gem_exec_whisper.c
+++ b/tests/i915/gem_exec_whisper.c
@@ -209,7 +209,9 @@ static void whisper(int fd, unsigned engine, unsigned flags)
nengine = 0;
if (engine == ALL_ENGINES) {
- for_each_physical_engine(fd, engine) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
if (gem_can_store_dword(fd, engine))
engines[nengine++] = engine;
}
diff --git a/tests/i915/gem_ring_sync_loop.c b/tests/i915/gem_ring_sync_loop.c
index 118f3638..ba4adc09 100644
--- a/tests/i915/gem_ring_sync_loop.c
+++ b/tests/i915/gem_ring_sync_loop.c
@@ -38,6 +38,7 @@ IGT_TEST_DESCRIPTION("Basic check of ring<->ring write synchronisation.");
static void
sync_loop(int fd)
{
+ const struct intel_execution_engine *exec_engine_iter;
const uint32_t bbe = MI_BATCH_BUFFER_END;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 object[2];
@@ -48,7 +49,7 @@ sync_loop(int fd)
int i;
nengine = 0;
- for_each_physical_engine(fd, engine)
+ for_each_physical_engine(fd, exec_engine_iter, engine)
engines[nengine++] = engine;
igt_require(nengine);
diff --git a/tests/i915/gem_spin_batch.c b/tests/i915/gem_spin_batch.c
index 52410010..96429257 100644
--- a/tests/i915/gem_spin_batch.c
+++ b/tests/i915/gem_spin_batch.c
@@ -73,9 +73,10 @@ static void spin_exit_handler(int sig)
static void spin_on_all_engines(int fd, unsigned int timeout_sec)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engine;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
igt_fork(child, 1) {
igt_install_exit_handler(spin_exit_handler);
spin(fd, engine, timeout_sec);
diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index 3e4feff3..b4352e5b 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -86,8 +86,10 @@ sync_ring(int fd, unsigned ring, int num_children, int timeout)
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
- names[num_engines] = e__->name;
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -185,11 +187,13 @@ wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
- names[num_engines] = e__->name;
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -301,11 +305,13 @@ static void active_ring(int fd, unsigned ring, int timeout)
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
- names[num_engines] = e__->name;
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -370,11 +376,13 @@ active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
- names[num_engines] = e__->name;
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -509,11 +517,13 @@ store_ring(int fd, unsigned ring, int num_children, int timeout)
int num_engines = 0;
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
- names[num_engines] = e__->name;
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -626,11 +636,13 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
gem_require_contexts(fd);
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
- names[num_engines] = e__->name;
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -953,7 +965,9 @@ store_many(int fd, unsigned ring, int timeout)
intel_detect_and_clear_missed_interrupts(fd);
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
@@ -963,7 +977,7 @@ store_many(int fd, unsigned ring, int timeout)
timeout,
&shared[n]);
- names[n++] = e__->name;
+ names[n++] = exec_engine_iter->name;
}
igt_waitchildren();
} else {
@@ -984,10 +998,11 @@ store_many(int fd, unsigned ring, int timeout)
static void
sync_all(int fd, int num_children, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
unsigned engines[16], engine;
int num_engines = 0;
- for_each_physical_engine(fd, engine) {
+ for_each_physical_engine(fd, exec_engine_iter, engine) {
engines[num_engines++] = engine;
if (num_engines == ARRAY_SIZE(engines))
break;
@@ -1035,12 +1050,13 @@ sync_all(int fd, int num_children, int timeout)
static void
store_all(int fd, int num_children, int timeout)
{
+ const struct intel_execution_engine *exec_engine_iter;
const int gen = intel_gen(intel_get_drm_devid(fd));
unsigned engines[16];
int num_engines = 0;
unsigned int ring;
- for_each_physical_engine(fd, ring) {
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
if (!gem_can_store_dword(fd, ring))
continue;
@@ -1149,8 +1165,10 @@ preempt(int fd, unsigned ring, int num_children, int timeout)
uint32_t ctx[2];
if (ring == ALL_ENGINES) {
- for_each_physical_engine(fd, ring) {
- names[num_engines] = e__->name;
+ const struct intel_execution_engine *exec_engine_iter;
+
+ for_each_physical_engine(fd, exec_engine_iter, ring) {
+ names[num_engines] = exec_engine_iter->name;
engines[num_engines++] = ring;
if (num_engines == ARRAY_SIZE(engines))
break;
--
2.21.0
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