[igt-dev] [PATCH v17 2/7] lib: ioctl_wrappers: reach engines by index as well

[Chris Wilson]

Quoting Andi Shyti (2019-04-05 02:07:32)
> From: Andi Shyti <andi.shyti at intel.com>
> 
> With the new engine query method engines are reachable through
> an index and context they are combined with.
> 
> The 'gem_has_ring()' becomes 'gem_context_has_engine()' that
> requires the index that the engine is mapped within the driver.
> The function has been moved from lib/ioctl_wappers to
> lib/i915/gem_context where it is more appropriate.
> 
> The previous 'gem_has_ring()' function becomes a wrapper to the
> new 'gem_context_has_engine()'.
> 
> Signed-off-by: Andi Shyti <andi.shyti at intel.com>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
>  lib/i915/gem_context.c | 27 +++++++++++++++++++++++++++
>  lib/i915/gem_context.h |  2 ++
>  lib/ioctl_wrappers.c   | 19 -------------------
>  lib/ioctl_wrappers.h   |  3 ++-
>  4 files changed, 31 insertions(+), 20 deletions(-)
> 
> diff --git a/lib/i915/gem_context.c b/lib/i915/gem_context.c
> index 8b4d5b704650..488f4971c448 100644
> --- a/lib/i915/gem_context.c
> +++ b/lib/i915/gem_context.c
> @@ -271,3 +271,30 @@ void gem_context_set_priority(int fd, uint32_t ctx_id, int prio)
>  {
>         igt_assert_eq(__gem_context_set_priority(fd, ctx_id, prio), 0);
>  }
> +
> +bool gem_context_has_engine(int fd, uint64_t ctx, uint64_t engine)

Despite appearances, ctx is only a u32. And rsvd1 has the upper 32bits
still unassigned. Left engine as uint64_t, feels overkill but flags is a
full 64b and there may be good reason to stuff extra flags through this
interface (though that may be rightfully considered abuse).

Pushed this first pair, thanks.
-Chris