[igt-dev] [PATCH i-g-t v10 2/3] lib/intel_mmio: add funtions for read/write register funtions
Daniel Mrzyglod
daniel.t.mrzyglod at intel.com
Wed Aug 28 16:16:15 UTC 2019
This patch is first move to extend functionality of intel_mmio library.
There was limitation for 1 device, adding pointer for IO functions to
mmaped area gives us possibility to use those IO functions for other mmaped
devices.
v10: add macros for legacy functions
v9: fix bad castings
v8: remove unnecessary castings
v4: reword commitmsg, spelling errors
Cc: Antonio Argenziano <antonio.argenziano at intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio at intel.com>
Cc: Katarzyna Dec <katarzyna.dec at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala at intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
Cc: Jani Nikula <jani.nikula at intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
Signed-off-by: Daniel Mrzyglod <daniel.t.mrzyglod at intel.com>
---
lib/intel_io.h | 29 ++++++++++++++++++-----
lib/intel_mmio.c | 60 ++++++++++++++++++++++++++----------------------
2 files changed, 56 insertions(+), 33 deletions(-)
diff --git a/lib/intel_io.h b/lib/intel_io.h
index 6014c485..a4f9fdf7 100644
--- a/lib/intel_io.h
+++ b/lib/intel_io.h
@@ -42,12 +42,29 @@ uint32_t intel_register_read(uint32_t reg);
void intel_register_write(uint32_t reg, uint32_t val);
int intel_register_access_needs_fakewake(void);
-uint32_t INREG(uint32_t reg);
-uint16_t INREG16(uint32_t reg);
-uint8_t INREG8(uint32_t reg);
-void OUTREG(uint32_t reg, uint32_t val);
-void OUTREG16(uint32_t reg, uint16_t val);
-void OUTREG8(uint32_t reg, uint8_t val);
+
+uint32_t INREG_DEV(void *mmio, uint32_t reg);
+uint16_t INREG16_DEV(void *mmio, uint32_t reg);
+uint8_t INREG8_DEV(void *mmio, uint32_t reg);
+void OUTREG_DEV(void *mmio, uint32_t reg, uint32_t val);
+void OUTREG16_DEV(void *mmio, uint32_t reg, uint16_t val);
+void OUTREG8_DEV(void *mmio, uint32_t reg, uint8_t val);
+
+#define INREG_PTR(n,...) INREG##n##_DEV(__VA_ARGS__)
+#define INREG_NOPTR(n,...) INREG##n##_DEV(igt_global_mmio, __VA_ARGS__)
+#define INREG_GET_MACRO(_1,_2,NAME,...) NAME
+#define INREGX(n,...) INREG_GET_MACRO(__VA_ARGS__, INREG_PTR, INREG_NOPTR)(n, __VA_ARGS__)
+#define INREG16(...) INREGX(16, __VA_ARGS__)
+#define INREG8(...) INREGX(8, __VA_ARGS__)
+#define INREG(...) INREGX(,__VA_ARGS__)
+
+#define OUTREG_PTR(n,...) OUTREG##n##_DEV(__VA_ARGS__)
+#define OUTREG_NOPTR(n,...) OUTREG##n##_DEV(igt_global_mmio, __VA_ARGS__)
+#define OUTREG_GET_MACRO(_1,_2,_3,NAME,...) NAME
+#define OUTREGX(n, ...) OUTREG_GET_MACRO(__VA_ARGS__, OUTREG_PTR, OUTREG_NOPTR)(n, __VA_ARGS__)
+#define OUTREG16(...) OUTREGX(16, __VA_ARGS__)
+#define OUTREG8(...) OUTREGX(8, __VA_ARGS__)
+#define OUTREG(...) OUTREGX(,__VA_ARGS__)
/* sideband access functions from intel_iosf.c */
uint32_t intel_dpio_reg_read(uint32_t reg, int phy);
diff --git a/lib/intel_mmio.c b/lib/intel_mmio.c
index a5458aeb..20ed8a07 100644
--- a/lib/intel_mmio.c
+++ b/lib/intel_mmio.c
@@ -266,7 +266,7 @@ intel_register_read(uint32_t reg)
}
read_out:
- ret = *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+ ret = *(volatile uint32_t *)(igt_global_mmio + reg);
out:
return ret;
}
@@ -303,63 +303,66 @@ intel_register_write(uint32_t reg, uint32_t val)
"Register write blocked for safety ""(*0x%08x = 0x%x)\n", reg, val);
write_out:
- *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
+ *(volatile uint32_t *)(igt_global_mmio + reg) = val;
}
-
/**
- * INREG:
+ * INREG_DEV:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 32-bit read of the register at offset @reg. This function only works when the
* new register access helper is initialized with intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*
* Returns:
* The value read from the register.
*/
-uint32_t INREG(uint32_t reg)
+uint32_t INREG_DEV(void *mmio, uint32_t reg)
{
- return *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+ return *((volatile uint32_t *)mmio + reg);
}
/**
- * INREG16:
+ * INREG16_DEV:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 16-bit read of the register at offset @reg. This function only works when the
* new register access helper is initialized with intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*
* Returns:
* The value read from the register.
*/
-uint16_t INREG16(uint32_t reg)
+uint16_t INREG16_DEV(void *mmio, uint32_t reg)
{
- return *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg);
+ return *((volatile uint16_t *)mmio + reg);
}
/**
- * INREG8:
+ * INREG8_DEV:
+ * @igt_mmio maped memory pointer
* @reg: register offset
*
* 8-bit read of the register at offset @reg. This function only works when the
* new register access helper is initialized with intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*
* Returns:
* The value read from the register.
*/
-uint8_t INREG8(uint32_t reg)
+uint8_t INREG8_DEV(void *mmio, uint32_t reg)
{
- return *((volatile uint8_t *)igt_global_mmio + reg);
+ return *((volatile uint8_t *)mmio + reg);
}
/**
- * OUTREG:
+ * OUTREG_DEV:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
*
@@ -367,15 +370,16 @@ uint8_t INREG8(uint32_t reg)
* when the new register access helper is initialized with
* intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*/
-void OUTREG(uint32_t reg, uint32_t val)
+void OUTREG_DEV(void *mmio, uint32_t reg, uint32_t val)
{
- *(volatile uint32_t *)((volatile char *)igt_global_mmio + reg) = val;
+ *(volatile uint32_t *)(mmio + reg) = val;
}
/**
- * OUTREG16:
+ * OUTREG16_DEV:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
*
@@ -383,15 +387,16 @@ void OUTREG(uint32_t reg, uint32_t val)
* when the new register access helper is initialized with
* intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*/
-void OUTREG16(uint32_t reg, uint16_t val)
+void OUTREG16_DEV(void *mmio, uint32_t reg, uint16_t val)
{
- *(volatile uint16_t *)((volatile char *)igt_global_mmio + reg) = val;
+ *(volatile uint16_t *)(mmio + reg) = val;
}
/**
- * OUTREG8:
+ * OUTREG8_DEV:
+ * @igt_mmio maped memory pointer
* @reg: register offset
* @val: value to write
*
@@ -399,9 +404,10 @@ void OUTREG16(uint32_t reg, uint16_t val)
* when the new register access helper is initialized with
* intel_register_access_init().
*
- * This function directly accesses the #igt_global_mmio without safety checks.
+ * This function directly accesses the igt_mmio without safety checks.
*/
-void OUTREG8(uint32_t reg, uint8_t val)
+void OUTREG8_DEV(void *mmio, uint32_t reg, uint8_t val)
{
- *((volatile uint8_t *)igt_global_mmio + reg) = val;
+ *((volatile uint8_t *)mmio + reg) = val;
}
+
--
2.21.0
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