[igt-dev] [PATCH i-g-t] i915/gem_mocs_settings: Add mocs table for icelake

[Prathap Kumar Valsan]

From: "Kumar Valsan, Prathap" <prathap.kumar.valsan at intel.com>

This patch adds mocs table for icelake with expected L3 and eDRAM
control values.

Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan at intel.com>
---
 tests/i915/gem_mocs_settings.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 5b3b6bc1..bae245ef 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -73,6 +73,18 @@ struct mocs_table {
 };
 
 /* The first entries in the MOCS tables are defined by uABI */
+static const struct mocs_entry icelake_mocs_table[] = {
+	{ 0x00000005, 0x0010 },
+	{ 0x00000004, 0x0030 },
+	{ 0x00000037, 0x0030 },
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[] = {
+	{ 0x0007FFFF, 0x003F },
+	{ 0x0007FFFF, 0x003F },
+	{ 0x0007FFFF, 0x003F },
+};
+
 static const struct mocs_entry skylake_mocs_table[] = {
 	{ 0x00000009, 0x0010 },
 	{ 0x00000038, 0x0030 },
@@ -127,6 +139,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
 			table->table = broxton_mocs_table;
 		}
 		result = true;
+	} else if (IS_ICELAKE(devid)) {
+		if (dirty) {
+			table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+			table->table = dirty_icelake_mocs_table;
+		} else {
+			table->size  = ARRAY_SIZE(icelake_mocs_table);
+			table->table = icelake_mocs_table;
+		}
+		result = true;
 	}
 
 	return result;
-- 
2.20.1