[igt-dev] [PATCH i-g-t 3/6] tools/intel_watermark: Decode wm blocks correctly

[Ville Syrjälä]

On Mon, Jan 28, 2019 at 10:30:18PM +0000, Souza, Jose wrote:
> On Mon, 2019-01-28 at 22:01 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > Bump up the width of the wm blocks to 11 bits, which it is on icl.
> > On earlier platforms it was actually 10 bits but the code decoded
> > it as 9 bits.
> 
> 11? Where did you get that? BSpec says ICL still uses 10 bits and
> kernel is also using 10 bits for ICL.
> BSpec: 7670

My bspec clearly says 11. Are you looking at the pre-icl field?

I guess I'll have to go fix the kernel too then.

> 
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> >  tools/intel_watermark.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> > index c98b8649cc9c..97b769250927 100644
> > --- a/tools/intel_watermark.c
> > +++ b/tools/intel_watermark.c
> > @@ -319,7 +319,7 @@ static void skl_wm_dump(void)
> >  		for (level = 0; level < num_levels; level++) {
> >  			printf("%5d", level);
> >  			for (plane = 0; plane < num_planes; plane++) {
> > -				blocks =
> > REG_DECODE1(wm[level][pipe][plane], 0, 9);
> > +				blocks =
> > REG_DECODE1(wm[level][pipe][plane], 0, 11);
> >  				lines =
> > REG_DECODE1(wm[level][pipe][plane], 14, 5);
> >  				enable =
> > REG_DECODE1(wm[level][pipe][plane], 31, 1);
> >  
> > @@ -334,7 +334,7 @@ static void skl_wm_dump(void)
> >  
> >  		printf("TRANS");
> >  		for (plane = 0; plane < num_planes; plane++) {
> > -			blocks = REG_DECODE1(wm_trans[pipe][plane], 0,
> > 9);
> > +			blocks = REG_DECODE1(wm_trans[pipe][plane], 0,
> > 11);
> >  			lines = REG_DECODE1(wm_trans[pipe][plane], 14,
> > 5);
> >  			enable = REG_DECODE1(wm_trans[pipe][plane], 31,
> > 1);
> >  



-- 
Ville Syrjälä
Intel