[igt-dev] [PATCH i-g-t] gem_ctx_isolation.c - Gen11 enabling for context isolation test

[Dale B Stimson]

The context isolation test was being skipped for anything exceeding
Gen10.

Enable test execution through Gen11.

Test the same registers as for Gen9 through Gen10.

Signed-off-by: Dale Stimson <dale.b.stimson at intel.com>
---
 tests/i915/gem_ctx_isolation.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index 839d49ad..99d90aab 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -52,10 +52,12 @@ enum {
 #define GEN7 (ALL << 7)
 #define GEN8 (ALL << 8)
 #define GEN9 (ALL << 9)
+#define GEN10 (ALL << 10)
+#define GEN11 (ALL << 11)
 
 #define NOCTX 0
 
-#define LAST_KNOWN_GEN 10
+#define LAST_KNOWN_GEN 11
 
 static const struct named_register {
 	const char *name;
@@ -127,8 +129,8 @@ static const struct named_register {
 
 	/* Privileged (enabled by w/a + FORCE_TO_NONPRIV) */
 	{ "CTX_PREEMPT", NOCTX /* GEN_RANGE(9, 10) */, RCS0, 0x2248 },
-	{ "CS_CHICKEN1", GEN_RANGE(9, 10), RCS0, 0x2580 },
-	{ "HDC_CHICKEN1", GEN_RANGE(9, 10), RCS0, 0x7304 },
+	{ "CS_CHICKEN1", GEN_RANGE(9, 11), RCS0, 0x2580 },
+	{ "HDC_CHICKEN1", GEN_RANGE(9, 11), RCS0, 0x7304 },
 	{ "L3SQREG1", GEN8, RCS0, 0xb010 },
 
 	{ "BCS_GPR", GEN9, BCS0, 0x22600, 32 },
-- 
2.20.1