[igt-dev] [PATCH 09/10] tests/kms_plane_multiple/tgl: PCU messaging test
Lucas De Marchi
lucas.demarchi at intel.com
Mon Jul 22 16:46:55 UTC 2019
On Mon, Jul 22, 2019 at 02:07:36PM +0530, Karthik B S wrote:
>
>On 7/19/2019 6:24 PM, Ville Syrjälä wrote:
>>On Mon, Jul 15, 2019 at 02:51:35PM -0700, Lucas De Marchi wrote:
>>>From: Karthik B S <karthik.b.s at intel.com>
>>>
>>>Add a subtest that gives flips which alternate between least bandwidth
>>>requirement and highest bandwidth requirement.
>>>
>>>Cc: Mika Kahola <mika.kahola at intel.com>
>>>Signed-off-by: Karthik B S <karthik.b.s at intel.com>
>>>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>>>---
>>> tests/kms_plane_multiple.c | 178 ++++++++++++++++++++++++++++++-------
>>> 1 file changed, 148 insertions(+), 30 deletions(-)
>>>
>>>diff --git a/tests/kms_plane_multiple.c b/tests/kms_plane_multiple.c
>>>index 81ed45dd..2c726fda 100644
>>>--- a/tests/kms_plane_multiple.c
>>>+++ b/tests/kms_plane_multiple.c
>>>@@ -34,6 +34,11 @@ IGT_TEST_DESCRIPTION("Test atomic mode setting with multiple planes.");
>>> #define SIZE_PLANE 256
>>> #define SIZE_CURSOR 128
>>>+#define SIZE_PLANE_LOW 10
>>>+#define SIZE_PANE 5
>>>+#define SMALL_SCREEN 0
>>>+#define FULL_SCREEN 1
>>>+#define TEST_PCU_ALGO 1
>>That's way too i915 specific. Such a test should be totally generic.
>Sure. I'll update TEST_PCU_ALGO to TEST_BANDWIDTH. Would that be fine?
>I'll also change the test name from *_pcu to *_bw?
>
>Also to make it more generic, shall I remove the Gen12+ check for this
>test, as this test is expected to work on other platforms as well.
Karthik, I'll remove this patch from my series and let you handle the
comments and send an updated version, ok?
Lucas De Marchi
>>
>>> #define LOOP_FOREVER -1
>>> typedef struct {
>>>@@ -48,9 +53,17 @@ typedef struct {
>>> igt_crc_t ref_crc;
>>> igt_pipe_crc_t *pipe_crc;
>>> igt_plane_t **plane;
>>>+ unsigned int flag;
>>> struct igt_fb *fb;
>>> } data_t;
>>>+enum bandwidth {
>>>+ BW_PRIMARY_LOW,
>>>+ BW_PRIMARY_HIGH,
>>>+ BW_PRIMARY_LOW2,
>>>+ BW_HIGH,
>>>+ BW_INVALID,
>>>+};
>>> /* Command line parameters. */
>>> struct {
>>> int iterations;
>>>@@ -97,7 +110,7 @@ static void test_fini(data_t *data, igt_output_t *output, int n_planes)
>>> static void
>>> get_reference_crc(data_t *data, igt_output_t *output, enum pipe pipe,
>>>- color_t *color, uint64_t tiling)
>>>+ color_t *color, uint64_t tiling, int BW)
>>> {
>>> drmModeModeInfo *mode;
>>> igt_plane_t *primary;
>>>@@ -110,7 +123,9 @@ get_reference_crc(data_t *data, igt_output_t *output, enum pipe pipe,
>>> mode = igt_output_get_mode(output);
>>>- igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
>>>+ igt_create_color_fb(data->drm_fd,
>>>+ BW ? mode->hdisplay : SIZE_PLANE_LOW,
>>>+ BW ? mode->vdisplay : SIZE_PLANE_LOW,
>>> DRM_FORMAT_XRGB8888,
>>> LOCAL_DRM_FORMAT_MOD_NONE,
>>> color->red, color->green, color->blue,
>>>@@ -281,6 +296,76 @@ prepare_planes(data_t *data, enum pipe pipe_id, color_t *color,
>>> * The resulting CRC should be identical to the reference CRC
>>> */
>>>+static void
>>>+prepare_planes2(data_t *data, enum pipe pipe_id, color_t *color,
>>>+ uint64_t tiling, int max_planes, igt_output_t *output,
>>>+ enum bandwidth bandwidth)
>>>+{
>>>+ drmModeModeInfo *mode;
>>>+ int hsize, vsize;
>>>+ int i;
>>>+ cairo_t *cr;
>>>+
>>>+ igt_output_set_pipe(output, pipe_id);
>>>+ mode = igt_output_get_mode(output);
>>>+
>>>+ switch (bandwidth) {
>>>+ case BW_PRIMARY_LOW:
>>>+ case BW_PRIMARY_LOW2:
>>>+ hsize = SIZE_PLANE_LOW;
>>>+ vsize = SIZE_PLANE_LOW;
>>>+ break;
>>>+ case BW_PRIMARY_HIGH:
>>>+ case BW_HIGH:
>>>+ hsize = mode->hdisplay;
>>>+ vsize = mode->vdisplay;
>>>+ break;
>>>+ default:
>>>+ igt_warn("Invalid BW\n");
>>>+ }
>>>+
>>>+ for (i = 0; i < max_planes; i++) {
>>>+ igt_plane_t *plane = igt_output_get_plane(output, i);
>>>+ uint32_t format = DRM_FORMAT_XRGB8888;
>>>+
>>>+ if (plane->type == DRM_PLANE_TYPE_CURSOR) {
>>>+ format = DRM_FORMAT_ARGB8888;
>>>+ tiling = LOCAL_DRM_FORMAT_MOD_NONE;
>>>+ hsize = SIZE_CURSOR;
>>>+ vsize = SIZE_CURSOR;
>>>+ }
>>>+
>>>+ data->plane[i] = plane;
>>>+ igt_create_color_fb(data->drm_fd,
>>>+ hsize, vsize,
>>>+ format, tiling,
>>>+ color->red, color->green,
>>>+ color->blue,
>>>+ &data->fb[i]);
>>>+ igt_plane_set_position(data->plane[i], 0, 0);
>>>+
>>>+ hsize -= SIZE_PANE;
>>>+
>>>+ /* Create black color holes in all planes other than the cursor
>>>+ * and the topmost plane, so that all planes put together
>>>+ * produces a solid blue screen that matches with
>>>+ * the reference CRC.
>>>+ */
>>>+ if (i < (max_planes - 2) && bandwidth == BW_HIGH) {
>>>+ cr = igt_get_cairo_ctx(data->drm_fd, &data->fb[i]);
>>>+ igt_paint_color(cr, 0, 0, hsize, vsize, 0.0, 0.0, 0.0);
>>>+ igt_put_cairo_ctx(data->drm_fd, &data->fb[i], cr);
>>>+ }
>>>+
>>>+ igt_plane_set_fb(data->plane[i], &data->fb[i]);
>>>+
>>>+ if (bandwidth != BW_HIGH &&
>>>+ plane->type == DRM_PLANE_TYPE_PRIMARY)
>>>+ break;
>>>+
>>>+ }
>>>+}
>>>+
>>> static void
>>> test_plane_position_with_output(data_t *data, enum pipe pipe,
>>> igt_output_t *output, int n_planes,
>>>@@ -306,46 +391,67 @@ test_plane_position_with_output(data_t *data, enum pipe pipe,
>>> test_init(data, pipe, n_planes);
>>>- get_reference_crc(data, output, pipe, &blue, tiling);
>>>+ if (data->flag == TEST_PCU_ALGO) {
>>>+ for (i = BW_PRIMARY_LOW; i < BW_INVALID; i++) {
>>>+ if (i == BW_PRIMARY_LOW || i == BW_PRIMARY_LOW2)
>>>+ get_reference_crc(data, output, pipe, &blue,
>>>+ tiling, SMALL_SCREEN);
>>>+ else
>>>+ get_reference_crc(data, output, pipe, &blue,
>>>+ tiling, FULL_SCREEN);
>>>+
>>>+ /* Find out how many planes are allowed simultaneously */
>>>+ do {
>>>+ c++;
>>>+ prepare_planes(data, pipe, &blue, tiling, c, output);
>>>+ err = igt_display_try_commit2(&data->display, COMMIT_ATOMIC);
>>>- /* Find out how many planes are allowed simultaneously */
>>>- do {
>>>- c++;
>>>- prepare_planes(data, pipe, &blue, tiling, c, output);
>>>- err = igt_display_try_commit2(&data->display, COMMIT_ATOMIC);
>>>+ for_each_plane_on_pipe(&data->display, pipe, plane)
>>>+ igt_plane_set_fb(plane, NULL);
>>>- for_each_plane_on_pipe(&data->display, pipe, plane)
>>>- igt_plane_set_fb(plane, NULL);
>>>+ for (int x = 0; x < c; x++)
>>>+ igt_remove_fb(data->drm_fd, &data->fb[x]);
>>>+ } while (!err && c < n_planes);
>>>- for (int x = 0; x < c; x++)
>>>- igt_remove_fb(data->drm_fd, &data->fb[x]);
>>>- } while (!err && c < n_planes);
>>>+ if (err)
>>>+ c--;
>>>- if (err)
>>>- c--;
>>>+ igt_info("Testing connector %s using pipe %s with %d planes %s with seed %d\n",
>>>+ igt_output_name(output), kmstest_pipe_name(pipe), c,
>>>+ info, opt.seed);
>>>- igt_info("Testing connector %s using pipe %s with %d planes %s with seed %d\n",
>>>- igt_output_name(output), kmstest_pipe_name(pipe), c,
>>>- info, opt.seed);
>>>+ prepare_planes2(data, pipe, &blue, tiling,
>>>+ n_planes, output, i);
>>>+ igt_display_commit2(&data->display, COMMIT_ATOMIC);
>>>- i = 0;
>>>- while (i < iterations || loop_forever) {
>>>- /* randomize planes and set up the holes */
>>>- prepare_planes(data, pipe, &blue, tiling, c, output);
>>>+ igt_pipe_crc_get_current(data->display.drm_fd,
>>>+ data->pipe_crc, &crc);
>>>- igt_display_commit2(&data->display, COMMIT_ATOMIC);
>>>+ igt_assert_crc_equal(&data->ref_crc, &crc);
>>>+ }
>>>+ } else {
>>>+ i = 0;
>>>+ get_reference_crc(data, output, pipe, &blue, tiling, FULL_SCREEN);
>>>+
>>>+ while (i < iterations || loop_forever) {
>>>+ prepare_planes(data, pipe, &blue, tiling,
>>>+ n_planes, output);
>>>- igt_pipe_crc_get_current(data->display.drm_fd, data->pipe_crc, &crc);
>>>+ igt_display_commit2(&data->display, COMMIT_ATOMIC);
>>>- for_each_plane_on_pipe(&data->display, pipe, plane)
>>>- igt_plane_set_fb(plane, NULL);
>>>+ igt_pipe_crc_get_current(data->display.drm_fd,
>>>+ data->pipe_crc, &crc);
>>>- for (int x = 0; x < c; x++)
>>>- igt_remove_fb(data->drm_fd, &data->fb[x]);
>>>+ for_each_plane_on_pipe(&data->display, pipe, plane)
>>>+ igt_plane_set_fb(plane, NULL);
>>>- igt_assert_crc_equal(&data->ref_crc, &crc);
>>>+ for (int x = 0; x < c; x++)
>>>+ igt_remove_fb(data->drm_fd, &data->fb[x]);
>>>- i++;
>>>+ igt_assert_crc_equal(&data->ref_crc, &crc);
>>>+
>>>+ i++;
>>>+ }
>>> }
>>> test_fini(data, output, n_planes);
>>>@@ -355,8 +461,12 @@ static void
>>> test_plane_position(data_t *data, enum pipe pipe, uint64_t tiling)
>>> {
>>> igt_output_t *output;
>>>+ int devid = intel_get_drm_devid(data->drm_fd);
>>> int n_planes = data->display.pipes[pipe].n_planes;
>>>+ if (data->flag == TEST_PCU_ALGO)
>>>+ igt_require(AT_LEAST_GEN(devid, 12));
>>>+
>>> output = igt_get_single_output_for_pipe(&data->display, pipe);
>>> igt_require(output);
>>>@@ -377,6 +487,14 @@ run_tests_for_pipe(data_t *data, enum pipe pipe)
>>> igt_require(data->display.pipes[pipe].n_planes > 0);
>>> }
>>>+
>>>+ data->flag = TEST_PCU_ALGO;
>>>+
>>>+ igt_subtest_f("atomic-pipe-%s-tiling-none_pcu", kmstest_pipe_name(pipe))
>>>+ test_plane_position(data, pipe, LOCAL_DRM_FORMAT_MOD_NONE);
>>>+
>>>+ data->flag = 0;
>>>+
>>> igt_subtest_f("atomic-pipe-%s-tiling-x", kmstest_pipe_name(pipe))
>>> test_plane_position(data, pipe, LOCAL_I915_FORMAT_MOD_X_TILED);
>>>--
>>>2.21.0
>>>
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