[igt-dev] [PATCH 3/5] i915/gem_mocs_settings: add MOCS table for Tiger Lake
Daniele Ceraolo Spurio
daniele.ceraolospurio at intel.com
Sat Jul 27 00:16:02 UTC 2019
On 7/25/19 1:33 PM, Lucas De Marchi wrote:
> Some small changes compared to Ice Lake, namely:
>
> - Removed entries 0 and 1: they are now reserved and shouldn't be used
> - Entries 16, 17, 48..61 were previously unused and are now available
>
Not related to this patch, but entries 16 and 17 are defined in the
gen11 table because they're required on EHL, so we need to update the
test to check those as well.
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
> tests/i915/gem_mocs_settings.c | 38 ++++++++++++++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
> index 9f4e1b6d..e3da8515 100644
> --- a/tests/i915/gem_mocs_settings.c
> +++ b/tests/i915/gem_mocs_settings.c
> @@ -78,6 +78,40 @@ struct mocs_table {
> };
>
> /* The first entries in the MOCS tables are defined by uABI */
> +
> +static const struct mocs_entry tigerlake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> + [2] = { 0x00000037, 0x0030, 0x1},
> + [3] = { 0x00000005, 0x0010, 0x1},
> + [4] = { 0x00000005, 0x0030, 0x1},
> + [5] = { 0x00000037, 0x0010, 0x1},
> + [6] = { 0x00000017, 0x0010, 0x1},
> + [7] = { 0x00000017, 0x0030, 0x1},
> + [8] = { 0x00000027, 0x0010, 0x1},
> + [9] = { 0x00000027, 0x0030, 0x1},
> + [10] = { 0x00000077, 0x0010, 0x1},
> + [11] = { 0x00000077, 0x0030, 0x1},
> + [12] = { 0x00000057, 0x0010, 0x1},
> + [13] = { 0x00000057, 0x0030, 0x1},
> + [14] = { 0x00000067, 0x0010, 0x1},
> + [15] = { 0x00000067, 0x0030, 0x1},
> + [16] = { 0x00004005, 0x0010, 0x1},
> + [17] = { 0x00004005, 0x0030, 0x1},
> + [18] = { 0x00060037, 0x0030, 0x1},
> + [19] = { 0x00000737, 0x0030, 0x1},
> + [20] = { 0x00000337, 0x0030, 0x1},
> + [21] = { 0x00000137, 0x0030, 0x1},
> + [22] = { 0x000003b7, 0x0030, 0x1},
> + [23] = { 0x000007b7, 0x0030, 0x1},
> + [48] = { 0x00000037, 0x0030, 0x1},
> + [49] = { 0x00000005, 0x0030, 0x1},
> + [50] = { 0x00000037, 0x0010, 0x1},
> + [51] = { 0x00000005, 0x0010, 0x1},
> + [60] = { 0x00000037, 0x0010, 0x1},
> + [61] = { 0x00004005, 0x0030, 0x1},
> + [62] = { 0x00000037, 0x0010, 0x1},
> + [63] = { 0x00000037, 0x0010, 0x1},
> +};
> +
Matches the specs.
> static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
> [0] = { 0x00000005, 0x0010, 0x1},
> [1] = ICELAKE_MOCS_PTE,
> @@ -158,6 +192,10 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
> table->size = ARRAY_SIZE(icelake_mocs_table);
> table->table = icelake_mocs_table;
> result = true;
> + } else if (IS_GEN(devid, 12)) {
This should be IS_TIGERLAKE for consistency, since all the other lists
are assigned with checks per-platform rather than per-gen. With that:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Daniele
> + table->size = ARRAY_SIZE(tigerlake_mocs_table);
> + table->table = tigerlake_mocs_table;
> + result = true;
> }
>
> return result;
>
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