[igt-dev] [PATCH v11 2/6] lib/i915: add gem_engine_topology library
Andi Shyti
andi.shyti at intel.com
Tue Mar 12 17:17:24 UTC 2019
The gem_engine_topology library is a set of functions that
interface with the query and getparam/setparam ioctls.
The library's three main access points are:
- get_active_engines()
- __gem_prepare_context_engines()
- igt_require_gem_engine_list()
The first two functions are similar, with the difference that the
'gem_set_context_get_engines()' sets the engine before returning
the engine list in a 'intel_execution_engine2' type array.
Another improtant difference is that the first function works
only with the getparam/setparam and query ioctls are implemented
and it return 'NULL' in the other case.
It can be also used to check whether the current kernel contains
the new API.
'__gem_prepare_context_engines()' function, at the first call
generates the array of active engines (either physical or
virtual) called 'intel_active_engines2'.
If the driver cannot be queried, the 'intel_active_engines2'
array points to the exisiting 'intel_execution_engines2' which
has been previously defined.
The value of the 'intel_active_engines2' will be used in further
calls to check whether the above mentioned ioctls are implemented
without the need to call getparam().
The 'igt_require_gem_engine_list()' causes the test to fail in
case the required ioctls are not implemented.
Signed-off-by: Andi Shyti <andi.shyti at intel.com>
---
Hi Tvrtko,
the only thing I left untouched here is the fixed SIZEOF_QUERY,
even though the query ioctl doesn't have any limitation on query
size. The reason is because we've been discussing with Chris
setting a fixed size to prioritise stack allocation over heap
allocation so that I changed it to the way is done now from the
way you recommended at the beginning (already).
Andi
lib/Makefile.sources | 2 +
lib/i915/gem_engine_topology.c | 193 +++++++++++++++++++++++++++++++++
lib/i915/gem_engine_topology.h | 33 ++++++
lib/igt_gt.c | 2 +-
lib/igt_gt.h | 2 +-
lib/meson.build | 1 +
6 files changed, 231 insertions(+), 2 deletions(-)
create mode 100644 lib/i915/gem_engine_topology.c
create mode 100644 lib/i915/gem_engine_topology.h
diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index cf2720981707..757bd7a17ebe 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -13,6 +13,8 @@ lib_source_list = \
i915/gem_ring.c \
i915/gem_mman.c \
i915/gem_mman.h \
+ i915/gem_engine_topology.c \
+ i915/gem_engine_topology.h \
i915_3d.h \
i915_reg.h \
i915_pciids.h \
diff --git a/lib/i915/gem_engine_topology.c b/lib/i915/gem_engine_topology.c
new file mode 100644
index 000000000000..6d6cb85b0a26
--- /dev/null
+++ b/lib/i915/gem_engine_topology.c
@@ -0,0 +1,193 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "drmtest.h"
+#include "igt_gt.h"
+#include "ioctl_wrappers.h"
+
+#include "i915/gem_engine_topology.h"
+
+#define SIZEOF_CTX_PARAM offsetof(struct i915_context_param_engines, \
+ class_instance[I915_EXEC_RING_MASK + 1])
+#define SIZEOF_QUERY offsetof(struct drm_i915_query_engine_info, \
+ engines[I915_EXEC_RING_MASK + 1])
+
+static struct intel_execution_engine2 *intel_active_engines2;
+static bool ctx_is_set;
+
+static int __gem_query(int fd, struct drm_i915_query *q)
+{
+ int err = 0;
+
+ if (igt_ioctl(fd, DRM_IOCTL_I915_QUERY, q))
+ err = -errno;
+
+ errno = 0;
+ return err;
+}
+
+static void gem_query(int fd, struct drm_i915_query *q)
+{
+ igt_assert_eq(__gem_query(fd, q), 0);
+}
+
+static void query_engines(int fd,
+ struct drm_i915_query_engine_info *query_engines)
+{
+ struct drm_i915_query_item item = { };
+ struct drm_i915_query query = { };
+
+ item.query_id = DRM_I915_QUERY_ENGINE_INFO;
+ query.items_ptr = to_user_pointer(&item);
+ query.num_items = 1;
+ item.length = SIZEOF_QUERY;
+
+ item.data_ptr = to_user_pointer(query_engines);
+
+ gem_query(fd, &query);
+}
+
+static void set_ctx_param_engines(int fd, uint32_t ctx_id)
+{
+ struct i915_context_param_engines *ctx_engine;
+ struct drm_i915_gem_context_param ctx_param;
+ const struct intel_execution_engine2 *e2;
+ uint8_t buff[SIZEOF_CTX_PARAM] = { };
+ int i;
+
+ if (ctx_is_set)
+ return;
+
+ ctx_engine = (struct i915_context_param_engines *) buff;
+
+ ctx_param.ctx_id = ctx_id;
+ ctx_param.param = I915_CONTEXT_PARAM_ENGINES;
+
+ ctx_engine->extensions = 0;
+ for (i = 0, e2 = intel_active_engines2; e2->name; i++, e2++) {
+ ctx_engine->class_instance[i].engine_class = e2->class;
+ ctx_engine->class_instance[i].engine_instance = e2->instance;
+ }
+
+ ctx_param.size = offsetof(typeof(*ctx_engine), class_instance[i + 1]);
+ ctx_param.value = to_user_pointer(ctx_engine);
+
+ gem_context_set_param(fd, &ctx_param);
+
+ ctx_is_set = true;
+}
+
+/*
+ * Initializes the list of engines.
+ *
+ * Returns:
+ *
+ * - 0 in case of success and the get/set_param ioctls are implemented
+ * - -ENODEV in case of success but I915_CONTEXT_PARAM_ENGINES is not
+ * implemented in DRM_IOCTL_I915_GEM_CONTEXT_GETPARAM ioctl.
+ */
+static int init_engine_list(int fd)
+{
+ const char *class_names[] = { "rcs", "bcs", "vcs", "vecs" };
+ struct drm_i915_query_engine_info *query_engine;
+ unsigned char query_buffer[SIZEOF_QUERY] = { };
+ struct drm_i915_gem_context_param ctx_param = {
+ .param = I915_CONTEXT_PARAM_ENGINES,
+ };
+ int i;
+
+ /* the list is already initialized */
+ if (intel_active_engines2)
+ return 0;
+
+ /*
+ * We check first whether the I915_CONTEXT_PARAM_ENGINES parameter is
+ * supported by the running kernel. If not, __gem_context_get_param()
+ * will return -EINVAL which, at this point, is not necessarily a
+ * failure but it means that we need to fall beck to polling the engines
+ * directly from intel_execution_engines2[].
+ *
+ * We will return -ENODEV with the meaning of missing interface
+ */
+ if (__gem_context_get_param(fd, &ctx_param))
+ return -ENODEV;
+
+ query_engine = (struct drm_i915_query_engine_info *) query_buffer;
+ query_engines(fd, query_engine);
+
+ intel_active_engines2 = malloc((query_engine->num_engines + 1) *
+ sizeof(*intel_active_engines2));
+ igt_assert(intel_active_engines2);
+
+ for (i = 0; i < query_engine->num_engines; i++) {
+ char *name;
+ __u16 class = query_engine->engines[i].engine_class;
+ __u16 instance = query_engine->engines[i].engine_instance;
+
+ intel_active_engines2[i].class = class;
+ intel_active_engines2[i].instance = instance;
+
+ /* if we don't recognise the class, then we mark it as "unk" */
+ if (class >= ARRAY_SIZE(class_names))
+ igt_assert(asprintf(&name, "unk-%d:%d",
+ class, instance) > 0);
+ else
+ igt_assert(asprintf(&name, "%s%d",
+ class_names[class], instance) > 0);
+
+ intel_active_engines2[i].name = name;
+ }
+
+ /* NULL value sentinel */
+ intel_active_engines2[i].name = NULL;
+
+ return 0;
+}
+
+struct intel_execution_engine2 *get_active_engines(int fd)
+{
+ if (init_engine_list(fd))
+ return NULL;
+
+ return intel_active_engines2;
+}
+
+struct intel_execution_engine2 *__gem_prepare_context_engines(int fd,
+ uint32_t ctx_id)
+{
+ struct intel_execution_engine2 *active_engines = get_active_engines(fd);
+
+ if (!active_engines) {
+ igt_debug("using pre-allocated engine list\n");
+ return intel_execution_engines2;
+ }
+
+ set_ctx_param_engines(fd, ctx_id);
+
+ return intel_active_engines2;
+}
+
+void igt_require_gem_engine_list(int fd)
+{
+ igt_require(!init_engine_list(fd));
+}
diff --git a/lib/i915/gem_engine_topology.h b/lib/i915/gem_engine_topology.h
new file mode 100644
index 000000000000..88e902610ad8
--- /dev/null
+++ b/lib/i915/gem_engine_topology.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright © 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef GEM_ENGINE_TOPOLOGY_H
+#define GEM_ENGINE_TOPOLOGY_H
+
+struct intel_execution_engine2 *get_active_engines(int fd);
+struct intel_execution_engine2 *__gem_prepare_context_engines(int fd,
+ uint32_t ctx_id);
+
+void igt_require_gem_engine_list(int fd);
+
+#endif /* GEM_ENGINE_TOPOLOGY_H */
diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index c98a7553b7fe..54c71e5e7186 100644
--- a/lib/igt_gt.c
+++ b/lib/igt_gt.c
@@ -577,7 +577,7 @@ bool gem_can_store_dword(int fd, unsigned int engine)
return true;
}
-const struct intel_execution_engine2 intel_execution_engines2[] = {
+struct intel_execution_engine2 intel_execution_engines2[] = {
{ "rcs0", I915_ENGINE_CLASS_RENDER, 0 },
{ "bcs0", I915_ENGINE_CLASS_COPY, 0 },
{ "vcs0", I915_ENGINE_CLASS_VIDEO, 0 },
diff --git a/lib/igt_gt.h b/lib/igt_gt.h
index 54e95da98084..f4bd6c22a81a 100644
--- a/lib/igt_gt.h
+++ b/lib/igt_gt.h
@@ -91,7 +91,7 @@ bool gem_ring_has_physical_engine(int fd, unsigned int ring);
bool gem_can_store_dword(int fd, unsigned int engine);
-extern const struct intel_execution_engine2 {
+extern struct intel_execution_engine2 {
const char *name;
int class;
int instance;
diff --git a/lib/meson.build b/lib/meson.build
index 0eb5585d72b9..3cc52f97c8bf 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -5,6 +5,7 @@ lib_sources = [
'i915/gem_submission.c',
'i915/gem_ring.c',
'i915/gem_mman.c',
+ 'i915/gem_engine_topology.c',
'igt_color_encoding.c',
'igt_debugfs.c',
'igt_device.c',
--
2.20.1
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