[igt-dev] [PATCH i-g-t] tests/kms_ccs: Leave CRC collection enabled

[Dhinakaran Pandiyan]

There are sporadic failures of this test due to CRC mismatches, but
nothing stands out in dmesg. Unlike the earlier CRC failures, there is no
visible corruption and the test consistently passes on the ICL's I tested.
So, the failures in CI look independent of the CCS functionality. Since
PSR can affect CRCs, let's try leaving CRC generation turned on for the
duration of a plane test. This prevents the kernel from flip-flop'ing
between PSR2 and PSR1 in the middle.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
---
 tests/kms_ccs.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c
index a74bd706..0ec34ece 100644
--- a/tests/kms_ccs.c
+++ b/tests/kms_ccs.c
@@ -347,7 +347,7 @@ static bool try_config(data_t *data, enum test_fb_flags fb_flags,
 		igt_assert_eq(ret, 0);
 
 		if (crc)
-			igt_pipe_crc_collect_crc(data->pipe_crc, crc);
+			igt_pipe_crc_get_current(data->drm_fd, data->pipe_crc, crc);
 	}
 
 	igt_debug_wait_for_keypress("ccs");
@@ -384,9 +384,11 @@ static int test_output(data_t *data)
 	}
 
 	igt_output_set_pipe(data->output, data->pipe);
+	igt_display_commit2(display, display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY);
 
 	if (data->flags & TEST_CRC) {
 		data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
+		igt_pipe_crc_start(data->pipe_crc);
 
 		if (try_config(data, fb_flags | FB_COMPRESSED, &ref_crc) &&
 		    try_config(data, fb_flags, &crc)) {
@@ -394,6 +396,7 @@ static int test_output(data_t *data)
 			valid_tests++;
 		}
 
+		igt_pipe_crc_stop(data->pipe_crc);
 		igt_pipe_crc_free(data->pipe_crc);
 		data->pipe_crc = NULL;
 	}
-- 
2.17.1