[igt-dev] [PATCH i-g-t v5] i915/gem_mocs_settings: Add mocs table for icelake
Chris Wilson
chris at chris-wilson.co.uk
Thu Mar 14 09:18:45 UTC 2019
Quoting Kalamarz, Lukasz (2019-03-13 13:58:59)
> On Tue, 2019-03-12 at 11:14 -0400, Prathap Kumar Valsan wrote:
> > From: "Kumar Valsan, Prathap" <prathap.kumar.valsan at intel.com>
> >
> > This patch adds mocs table for icelake with expected L3 and eDRAM
> > control values.
> >
> > Signed-off-by: Kumar Valsan, Prathap <prathap.kumar.valsan at intel.com>
> > ---
>
> Chris and Tomek suggested creating negative scenario, that will verify
> setting dirty mocs values instead of skipping for gen11+. But if they
> will agree that this is not a blocker, then
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz at intel.com>
It all depends on the level of confidence in follow through.
Lukasz, did you mean s-o-b or r-b? s-o-b just says you've handled the
patch in some official capacity; with an r-b you confirm that the patch
does what it says, and that it is doing the right thing (give or take we
are totally not robots), and so ready for inclusion.
-Chris
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