[igt-dev] [PATCH v16 8/8] test: perf_pmu: use the gem_engine_topology library
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Fri Mar 29 12:40:55 UTC 2019
On 28/03/2019 19:22, Andi Shyti wrote:
> Replace the legacy for_each_engine* defines with the ones
> implemented in the gem_engine_topology library.
>
> Use whenever possible gem_engine_can_store_dword() that checks
> class instead of flags.
>
> Now the __for_each_engine_class_instance and
> for_each_engine_class_instance are unused, remove them.
>
> Signed-off-by: Andi Shyti <andi.shyti at intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at linux.intel.com>
> ---
> lib/igt_gt.h | 7 -------
> tests/perf_pmu.c | 37 +++++++++++++++++++++++--------------
> 2 files changed, 23 insertions(+), 21 deletions(-)
>
> diff --git a/lib/igt_gt.h b/lib/igt_gt.h
> index f3f07e895733..cd6d7e4f8967 100644
> --- a/lib/igt_gt.h
> +++ b/lib/igt_gt.h
> @@ -118,11 +118,4 @@ void gem_require_engine(int gem_fd,
> igt_require(gem_has_engine(gem_fd, class, instance));
> }
>
> -#define __for_each_engine_class_instance(e__) \
> - for ((e__) = intel_execution_engines2; (e__)->name; (e__)++)
> -
> -#define for_each_engine_class_instance(fd__, e__) \
> - for ((e__) = intel_execution_engines2; (e__)->name; (e__)++) \
> - for_if (gem_has_engine((fd__), (e__)->class, (e__)->instance))
> -
> #endif /* IGT_GT_H */
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index 4f552bc2ae28..1487688781ab 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -170,14 +170,14 @@ static unsigned int e2ring(int gem_fd, const struct intel_execution_engine2 *e)
> #define FLAG_LONG (16)
> #define FLAG_HANG (32)
>
> -static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
> +static igt_spin_t * __spin_poll(int fd, uint32_t ctx, const struct intel_execution_engine2 *e)
> {
> struct igt_spin_factory opts = {
> .ctx = ctx,
> - .engine = flags,
> + .engine = e->flags,
> };
>
> - if (gem_can_store_dword(fd, flags))
> + if (gem_engine_can_store_dword(fd, e))
> opts.flags |= IGT_SPIN_POLL_RUN;
>
> return __igt_spin_batch_factory(fd, &opts);
> @@ -211,7 +211,16 @@ static unsigned long __spin_wait(int fd, igt_spin_t *spin)
>
> static igt_spin_t * __spin_sync(int fd, uint32_t ctx, unsigned long flags)
__spin_sync should also take engine instead of flags, like __spin_poll.
> {
> - igt_spin_t *spin = __spin_poll(fd, ctx, flags);
> + struct igt_spin_factory opts = {
> + .ctx = ctx,
> + .engine = flags,
> + };
> + igt_spin_t *spin;
> +
> + if (gem_can_store_dword(fd, flags))
> + opts.flags |= IGT_SPIN_POLL_RUN;
> +
> + spin = __igt_spin_batch_factory(fd, &opts);
And then you don't need this hunk at all, making the whole thing
completely ready for more engines.
And e2ring will end up with no callers so can be removed.
>
> __spin_wait(fd, spin);
>
> @@ -434,8 +443,8 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>
> i = 0;
> fd[0] = -1;
> - for_each_engine_class_instance(gem_fd, e_) {
> - if (e == e_)
> + __for_each_physical_engine(gem_fd, e_) {
> + if (e->class == e_->class && e->instance == e_->instance)
> busy_idx = i;
>
> fd[i++] = open_group(I915_PMU_ENGINE_BUSY(e_->class,
> @@ -497,13 +506,13 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
> unsigned int idle_idx, i;
>
> i = 0;
> - for_each_engine_class_instance(gem_fd, e_) {
> - if (e == e_)
> + __for_each_physical_engine(gem_fd, e_) {
> + if (e->class == e_->class && e->instance == e_->instance)
> idle_idx = i;
> else if (spin)
> __submit_spin_batch(gem_fd, spin, e_, 64);
> else
> - spin = __spin_poll(gem_fd, 0, e2ring(gem_fd, e_));
> + spin = __spin_poll(gem_fd, 0, e);
>
> val[i++] = I915_PMU_ENGINE_BUSY(e_->class, e_->instance);
> }
> @@ -554,11 +563,11 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines,
> unsigned int i;
>
> i = 0;
> - for_each_engine_class_instance(gem_fd, e) {
> + __for_each_physical_engine(gem_fd, e) {
> if (spin)
> __submit_spin_batch(gem_fd, spin, e, 64);
> else
> - spin = __spin_poll(gem_fd, 0, e2ring(gem_fd, e));
> + spin = __spin_poll(gem_fd, 0, e);
>
> val[i++] = I915_PMU_ENGINE_BUSY(e->class, e->instance);
> }
> @@ -1683,7 +1692,7 @@ igt_main
> igt_require_gem(fd);
> igt_require(i915_type_id() > 0);
>
> - for_each_engine_class_instance(fd, e)
> + __for_each_physical_engine(fd, e)
> num_engines++;
> }
>
> @@ -1693,7 +1702,7 @@ igt_main
> igt_subtest("invalid-init")
> invalid_init();
>
> - __for_each_engine_class_instance(e) {
> + __for_each_static_engine(e) {
> const unsigned int pct[] = { 2, 50, 98 };
>
> /**
> @@ -1897,7 +1906,7 @@ igt_main
> gem_quiescent_gpu(fd);
> }
>
> - __for_each_engine_class_instance(e) {
> + __for_each_static_engine(e) {
> igt_subtest_group {
> igt_fixture {
> gem_require_engine(render_fd,
>
Yep, modulo __spin_sync change, this is what I had in mind.
Regards,
Tvrtko
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