[igt-dev] [PATCH i-g-t] tests/kms_big_fb: Add max HW stride length tests

Ville Syrjälä ville.syrjala at linux.intel.com
Thu Oct 24 13:55:38 UTC 2019


On Thu, Oct 24, 2019 at 11:13:24AM +0300, Juha-Pekka Heikkila wrote:
> Test maximum HW stride lenghts. On Intel HW up to Gen10
> maximum HW stride lenght is 32K. On Gen11 when using 64bpp
> formats strides can reach up to 64k. These test try exact
> maximum HW strides so gtt remapping will not come in play.
> 
> v2: (Ville Syrjäjä) Build new tests to run using existing code.
> 
> Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> ---
>  tests/kms_big_fb.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++++++---
>  1 file changed, 68 insertions(+), 3 deletions(-)
> 
> diff --git a/tests/kms_big_fb.c b/tests/kms_big_fb.c
> index c3498c6..de24feb 100644
> --- a/tests/kms_big_fb.c
> +++ b/tests/kms_big_fb.c
> @@ -48,6 +48,9 @@ typedef struct {
>  	igt_render_copyfunc_t render_copy;
>  	drm_intel_bufmgr *bufmgr;
>  	struct intel_batchbuffer *batch;
> +	bool max_hw_stride_test;
> +	int hw_stride;
> +	int max_hw_fb_width;
>  } data_t;
>  
>  static void init_buf(data_t *data,
> @@ -161,9 +164,6 @@ static void max_fb_size(data_t *data, int *width, int *height,
>  	uint64_t size;
>  	int i = 0;
>  
> -	*width = data->max_fb_width;
> -	*height = data->max_fb_height;
> -
>  	/* max fence stride is only 8k bytes on gen3 */
>  	if (intel_gen(data->devid) < 4 &&
>  	    format == DRM_FORMAT_XRGB8888)
> @@ -417,6 +417,14 @@ static bool test_pipe(data_t *data)
>  
>  static void test_scanout(data_t *data)
>  {
> +	if (data->max_hw_stride_test) {

This parameter seems redundant. The format/mod loop can just assign
big_fb_width/height directly.

> +		data->big_fb_width = data->max_hw_fb_width;
> +		data->big_fb_height = data->max_hw_fb_width;
> +	} else {
> +		data->big_fb_width = data->max_fb_width;
> +		data->big_fb_height = data->max_fb_height;
> +	}
> +
>  	max_fb_size(data, &data->big_fb_width, &data->big_fb_height,
>  		    data->format, data->modifier);
>  
> @@ -649,6 +657,8 @@ igt_main
>  
>  		data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
>  		data.batch = intel_batchbuffer_alloc(data.bufmgr, data.devid);
> +
> +		data.max_hw_stride_test = false;
>  	}
>  
>  	/*
> @@ -704,6 +714,61 @@ igt_main
>  		}
>  	}
>  
> +	data.max_hw_stride_test = true;
> +	for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
> +		data.modifier = modifiers[i].modifier;
> +
> +		if (intel_gen(data.devid) < 11) {
> +			data.hw_stride = 32768;

That's only true for ilk+. We need to replicate i9xx_plane_max_stride()
from the kernel here. Also please move this into a nice little function
so we don't have to look at it when reading the main code. And I think
the function should just return the resulting max fb w/h and leave the
max stride/etc. as internal implementation details.

> +		} else {
> +			switch (data.modifier) {
> +			case DRM_FORMAT_MOD_LINEAR:
> +				data.hw_stride = 65536-64;
> +				break;
> +			default:
> +				data.hw_stride = 65536;
> +				break;
> +			}
> +		}
> +
> +		for (int j = 0; j < ARRAY_SIZE(formats); j++) {
> +			/*
> +			 * try only those formats which can show full lenght. 8K is
> +			 * the magic maximum pixels in Intel HW. Here 32K is used
> +			 * to have CI test results consistent for all platforms,
> +			 * 32K is smallest number possbily coming to hw_stride
> +			 * from above if{}else{}..
> +			 */
> +			if (32768 / (formats[j].bpp >> 3) > 8192)
> +				continue;
> +
> +			data.format = formats[j].format;
> +
> +			for (int k = 0; k < ARRAY_SIZE(rotations); k++) {
> +				data.rotation = rotations[k].rotation;
> +				/*
> +				 * Seems any format currently coming here will not support
> +				 * 90/270 rotations so skip those rotations.
> +				 */
> +				if (data.rotation&(IGT_ROTATION_90|IGT_ROTATION_270))
> +					continue;
> +
> +				igt_subtest_f("%s-max-hw-stride-%dbpp-rotate-%d", modifiers[i].name,
> +					      formats[j].bpp, rotations[k].angle) {
> +					data.max_hw_fb_width = data.hw_stride / (formats[j].bpp >> 3);
> +					igt_require(data.format == DRM_FORMAT_C8 ||
> +						    igt_fb_supported_format(data.format));
> +					igt_require(igt_display_has_format_mod(&data.display, data.format, data.modifier));
> +					test_scanout(&data);
> +				}
> +			}
> +
> +			igt_fixture
> +				cleanup_fb(&data);
> +		}
> +	}
> +	data.max_hw_stride_test = false;
> +
>  	igt_fixture {
>  		igt_display_fini(&data.display);
>  
> -- 
> 2.7.4
> 
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-- 
Ville Syrjälä
Intel


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