[igt-dev] [PATCH i-g-t v13 6/6] tests/i915/i915_pm_dc:Skip the DC6 test if BIOS has disabled PC8+

[Imre Deak]

On Sun, Sep 01, 2019 at 07:50:01PM +0530, Anshuman Gupta wrote:
> As DC6 requires platform to enter PC8 package C state.
> It make sense to skip the DC6 igt-test, if BIOS configuration
> has disabled PC8+ package C states.
> 
> Signed-off-by: Anshuman Gupta <anshuman.gupta at intel.com>
> ---
>  tests/i915/i915_pm_dc.c | 55 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 55 insertions(+)
> 
> diff --git a/tests/i915/i915_pm_dc.c b/tests/i915/i915_pm_dc.c
> index 4c7e152a..0b29599b 100644
> --- a/tests/i915/i915_pm_dc.c
> +++ b/tests/i915/i915_pm_dc.c
> @@ -26,19 +26,35 @@
>  #include "igt_sysfs.h"
>  #include "igt_psr.h"
>  #include <errno.h>
> +#include <fcntl.h>
>  #include <stdbool.h>
>  #include <stdio.h>
>  #include <string.h>
>  #include "intel_bufmgr.h"
>  #include "intel_io.h"
>  #include "limits.h"
> +#include "igt_kmod.h"
>  
>  /* DC State Flags */
>  #define CHECK_DC5	1
>  #define CHECK_DC6	2
>  
> +#define MSR_PKG_CST_CONFIG_CONTROL	0xE2
> +/*
> + * Below PKG CST limit mask and PC8 bits are meant for
> + * HSW,BDW SKL,ICL and Goldmont Microarch and future platforms.
> + * Refer IA S/W developers manual vol3c part3 chapter:35
> + */
> +#define  PKG_CST_LIMIT_MASK		0xF
> +#define  PKG_CST_LIMIT_C8		0x6
> +
> +#define MSR_PC8_RES	0x630
> +#define MSR_PC9_RES	0x631
> +#define MSR_PC10_RES	0x632
> +
>  typedef struct {
>  	int drm_fd;
> +	int msr_fd;
>  	int debugfs_fd;
>  	uint32_t devid;
>  	igt_display_t display;
> @@ -52,6 +68,34 @@ typedef struct {
>  static bool dc_state_wait_entry(int drm_fd, int dc_flag, int prev_dc_count);
>  static void check_dc_counter(int drm_fd, int dc_flag, uint32_t prev_dc_count);
>  
> +/* If the read fails, then the machine doesn't support PC8+ residencies. */
> +static bool supports_pc8_plus_residencies(data_t *data)
> +{
> +	int rc;
> +	uint64_t val;
> +	int msr_fd = data->msr_fd;
> +
> +	rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC8_RES);
> +	if (rc != sizeof(val))
> +		return false;
> +	rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC9_RES);
> +	if (rc != sizeof(val))
> +		return false;
> +	rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PC10_RES);
> +	if (rc != sizeof(val))
> +		return false;
> +
> +	rc = pread(msr_fd, &val, sizeof(uint64_t), MSR_PKG_CST_CONFIG_CONTROL);
> +	if (rc != sizeof(val))
> +		return false;
> +	if ((val & PKG_CST_LIMIT_MASK) < PKG_CST_LIMIT_C8) {
> +		igt_info("PKG C-states limited below PC8 by the BIOS\n");
> +		return false;
> +	}
> +
> +	return true;
> +}

I missed it last time, but this is a copy/paste from i915_pm_rpm, so
please factor it out instead into a lib function.

> +
>  static void setup_output(data_t *data)
>  {
>  	igt_display_t *display = &data->display;
> @@ -255,6 +299,12 @@ int main(int argc, char *argv[])
>  		igt_require(has_runtime_pm);
>  		igt_require(igt_pm_dmc_loaded(data.debugfs_fd));
>  		igt_display_require(&data.display, data.drm_fd);
> +		/* Make sure our Kernel supports MSR and the module is loaded */
> +		igt_require(igt_kmod_load("msr", NULL) == 0);
> +
> +		data.msr_fd = open("/dev/cpu/0/msr", O_RDONLY);
> +		igt_assert_f(data.msr_fd >= 0,
> +			     "Can't open /dev/cpu/0/msr.\n");
>  	}
>  
>  	igt_subtest("dc5-psr") {
> @@ -270,6 +320,8 @@ int main(int argc, char *argv[])
>  		psr_enable(data.debugfs_fd, data.op_psr_mode);
>  		igt_require_f(edp_psr_sink_support(&data),
>  			      "Sink does not support PSR\n");
> +		igt_require_f(supports_pc8_plus_residencies(&data),
> +			      "PC8+ residencies not supported\n");
>  		test_dc_state_psr(&data, CHECK_DC6);
>  	}
>  
> @@ -278,11 +330,14 @@ int main(int argc, char *argv[])
>  	}
>  
>  	igt_subtest("dc6-dpms") {
> +		igt_require_f(supports_pc8_plus_residencies(&data),
> +			      "PC8+ residencies not supported\n");
>  		test_dc_state_dpms(&data, CHECK_DC6);
>  	}
>  
>  	igt_fixture {
>  		close(data.debugfs_fd);
> +		close(data.msr_fd);
>  		display_fini(&data);
>  	}
>  
> -- 
> 2.21.0
>