[igt-dev] [PATCH i-g-t 1/2] lib/rendercopy/tgl: Add support for gem_render_* tests on TGL
Caz Yokoyama
Caz.Yokoyama at intel.com
Mon Sep 16 19:43:49 UTC 2019
On Mon, 2019-09-16 at 18:40 +0200, Zbigniew Kempczyński wrote:
> From: "Kalamarz, Lukasz" <lukasz.kalamarz at intel.com>
>
> Previous generations didn't use SWSB dependency tracking.
> For that reason shader was adopted to handle that on TGL.
>
> FIXME: Some tests still have to be fixed, currently working:
> gem_render_copy @linear @x-tiled @y-tiled @yf-tiled
> gem_render_copy_redux
> gem_render_linear_blits @basic
> gem_render_tiled_blits @basic
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz at intel.com>
> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
> Cc: Katarzyna Dec <katarzyna.dec at intel.com>
> Reviewed-by: Katarzyna Dec <katarzyna.dec at intel.com>
> ---
> lib/i915/shaders/ps/gen12p1_render_copy.asm | 16 +++++++++++
> lib/intel_batchbuffer.c | 2 ++
> lib/rendercopy.h | 5 ++++
> lib/rendercopy_gen9.c | 30
> +++++++++++++++++++++
> 4 files changed, 53 insertions(+)
> create mode 100644 lib/i915/shaders/ps/gen12p1_render_copy.asm
>
> diff --git a/lib/i915/shaders/ps/gen12p1_render_copy.asm
> b/lib/i915/shaders/ps/gen12p1_render_copy.asm
> new file mode 100644
> index 00000000..d293ab1b
> --- /dev/null
> +++ b/lib/i915/shaders/ps/gen12p1_render_copy.asm
> @@ -0,0 +1,16 @@
> +L0:
> +(W) mad
> (8|M0) acc0.0<1>:nf r6.3<0;0>:f r2.0<8;1>:f
> r6.0<0>:f
> +(W) mad
> (8|M0) r113.0<1>:f acc0.0<8;1>:nf r3.0<8;1>:f
> r6.1<0>:f
> +(W) mad
> (8|M0) acc0.0<1>:nf r6.3<0;0>:f r4.0<8;1>:f
> r6.0<0>:f
> +(W) mad
> (8|M0) r114.0<1>:f acc0.0<8;1>:nf r5.0<8;1>:f
> r6.1<0>:f
> +(W) mad
> (8|M0) acc0.0<1>:nf r6.7<0;0>:f r2.0<8;1>:f
> r6.4<0>:f
> +(W) mad
> (8|M0) r115.0<1>:f acc0.0<8;1>:nf r3.0<8;1>:f
> r6.5<0>:f
> +(W) mad
> (8|M0) acc0.0<1>:nf r6.7<0;0>:f r4.0<8;1>:f
> r6.4<0>:f
> +(W) mad
> (8|M0) r116.0<1>:f acc0.0<8;1>:nf r5.0<8;1>:f
> r6.5<0>:f
> +(W) send.smpl
> (16|M0) r12 r113 null 0x0 0x8840001 {@1,
> $0} // wr:4+0, rd:8, fc: 0x40001
> + mov
> (16|M0) r113.0<1>:f r12.0<8;8,1>:f {
> $0.dst}
> + mov (16|M0) r115.0<1>:f r14.0<8;8,1>:f
> + mov (16|M0) r117.0<1>:f r16.0<8;8,1>:f
> + mov (16|M0) r119.0<1>:f r18.0<8;8,1>:f
> +(W) send.rc
> (16|M0) null r113 null 0x0 0x10031000
> {EOT, @1} // wr:8+0, rd:0, Render Target Write msc:16, to #0
> +L224:
> diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
> index 07de5cbb..163ec4ac 100644
> --- a/lib/intel_batchbuffer.c
> +++ b/lib/intel_batchbuffer.c
> @@ -844,6 +844,8 @@ igt_render_copyfunc_t igt_get_render_copyfunc(int
> devid)
> copy = gen9_render_copyfunc;
> else if (IS_GEN11(devid))
> copy = gen11_render_copyfunc;
> + else if (IS_TIGERLAKE(devid))
As someone suggested, IS_GEN12(devid) will be better.
> + copy = gen12p1_render_copyfunc;
>
> return copy;
> }
> diff --git a/lib/rendercopy.h b/lib/rendercopy.h
> index 35c28dd9..ffe4c4c1 100644
> --- a/lib/rendercopy.h
> +++ b/lib/rendercopy.h
> @@ -23,6 +23,11 @@ static inline void emit_vertex_normalized(struct
> intel_batchbuffer *batch,
> OUT_BATCH(u.ui);
> }
>
> +void gen12p1_render_copyfunc(struct intel_batchbuffer *batch,
> + drm_intel_context *context,
> + const struct igt_buf *src, unsigned src_x,
> unsigned src_y,
> + unsigned width, unsigned height,
> + const struct igt_buf *dst, unsigned dst_x,
> unsigned dst_y);
> void gen11_render_copyfunc(struct intel_batchbuffer *batch,
> drm_intel_context *context,
> const struct igt_buf *src, unsigned src_x,
> unsigned src_y,
> diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
> index 259a3ca2..fffcd003 100644
> --- a/lib/rendercopy_gen9.c
> +++ b/lib/rendercopy_gen9.c
> @@ -101,6 +101,24 @@ static const uint32_t ps_kernel_gen11[][4] = {
> #endif
> };
>
> +/* see lib/i915/shaders/ps/gen12p1_render_copy.asm */
> +static const uint32_t gen12p1_render_copy[][4] = {
> + { 0x8003005b, 0x200002f0, 0x0a0a0664, 0x06040205 },
> + { 0x8003005b, 0x71040fa8, 0x0a0a2001, 0x06240305 },
> + { 0x8003005b, 0x200002f0, 0x0a0a0664, 0x06040405 },
> + { 0x8003005b, 0x72040fa8, 0x0a0a2001, 0x06240505 },
> + { 0x8003005b, 0x200002f0, 0x0a0a06e4, 0x06840205 },
> + { 0x8003005b, 0x73040fa8, 0x0a0a2001, 0x06a40305 },
> + { 0x8003005b, 0x200002f0, 0x0a0a06e4, 0x06840405 },
> + { 0x8003005b, 0x74040fa8, 0x0a0a2001, 0x06a40505 },
> + { 0x80049031, 0x0c440000, 0x20027124, 0x01000000 },
> + { 0x00042061, 0x71050aa0, 0x00460c05, 0x00000000 },
> + { 0x00040061, 0x73050aa0, 0x00460e05, 0x00000000 },
> + { 0x00040061, 0x75050aa0, 0x00461005, 0x00000000 },
> + { 0x00040061, 0x77050aa0, 0x00461205, 0x00000000 },
> + { 0x80040131, 0x00000004, 0x50007144, 0x00c40000 },
> +};
> +
> /* AUB annotation support */
> #define MAX_ANNOTATIONS 33
> struct annotations_context {
> @@ -1089,3 +1107,15 @@ void gen11_render_copyfunc(struct
> intel_batchbuffer *batch,
> width, height, dst, dst_x, dst_y,
> ps_kernel_gen11,
> sizeof(ps_kernel_gen11));
> }
> +
> +void gen12p1_render_copyfunc(struct intel_batchbuffer *batch,
> + drm_intel_context *context,
> + const struct igt_buf *src, unsigned src_x,
> unsigned src_y,
> + unsigned width, unsigned height,
> + const struct igt_buf *dst, unsigned dst_x,
> unsigned dst_y)
> +
> +{
> + _gen9_render_copyfunc(batch, context, src, src_x, src_y,
> + width, height, dst, dst_x, dst_y,
> gen12p1_render_copy,
> + sizeof(gen12p1_render_copy));
> +}
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