[igt-dev] [PATCH i-g-t v6 09/14] tests/gem|kms: remove libdrm dependency (batch 1)
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Fri Jul 24 20:22:28 UTC 2020
From: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
Use intel_bb / intel_buf to remove libdrm dependency.
Tests changed:
- gem_concurrent_all
- gem_ppgtt
- kms_draw_crc
- kms_frontbuffer_tracking
- kms_psr
Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
---
tests/i915/gem_concurrent_all.c | 431 ++++++++++++++++---------------
tests/i915/gem_ppgtt.c | 183 ++++++-------
tests/kms_draw_crc.c | 20 +-
tests/kms_frontbuffer_tracking.c | 20 +-
tests/kms_psr.c | 134 +++++-----
5 files changed, 391 insertions(+), 397 deletions(-)
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 80278c75..6ba12853 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -64,7 +64,9 @@ int pass;
struct create {
const char *name;
void (*require)(const struct create *, unsigned);
- drm_intel_bo *(*create)(drm_intel_bufmgr *, uint64_t size);
+ struct intel_buf *(*create)(struct buf_ops *bops, uint32_t width,
+ uint32_t height, uint32_t tiling,
+ uint64_t size);
};
struct size {
@@ -77,10 +79,10 @@ struct buffers {
const struct create *create;
const struct access_mode *mode;
const struct size *size;
- drm_intel_bufmgr *bufmgr;
- struct intel_batchbuffer *batch;
- drm_intel_bo **src, **dst;
- drm_intel_bo *snoop, *spare;
+ struct buf_ops *bops;
+ struct intel_bb *ibb;
+ struct intel_buf **src, **dst;
+ struct intel_buf *snoop, *spare;
uint32_t *tmp;
int width, height, npixels, page_size;
int count, num_buffers;
@@ -88,29 +90,32 @@ struct buffers {
#define MIN_BUFFERS 3
-static void blt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src);
+static void blt_copy_bo(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src);
static void
-nop_release_bo(drm_intel_bo *bo)
+nop_release_bo(struct intel_buf *buf)
{
- drm_intel_bo_unreference(bo);
+ if (buf->ptr)
+ intel_buf_unmap(buf);
+ intel_buf_destroy(buf);
}
static void
-prw_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+prw_set_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
for (int i = 0; i < b->npixels; i++)
b->tmp[i] = val;
- drm_intel_bo_subdata(bo, 0, 4*b->npixels, b->tmp);
+ gem_write(fd, buf->handle, 0, b->tmp, 4*b->npixels);
}
static void
-prw_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+prw_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
uint32_t *vaddr;
vaddr = b->tmp;
- do_or_die(drm_intel_bo_get_subdata(bo, 0, 4*b->npixels, vaddr));
+ gem_read(fd, buf->handle, 0, vaddr, 4*b->npixels);
for (int i = 0; i < b->npixels; i++)
igt_assert_eq_u32(vaddr[i], val);
}
@@ -118,31 +123,33 @@ prw_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
#define pixel(y, width) ((y)*(width) + (((y) + pass)%(width)))
static void
-partial_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+partial_set_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
for (int y = 0; y < b->height; y++)
- do_or_die(drm_intel_bo_subdata(bo, 4*pixel(y, b->width), 4, &val));
+ gem_write(fd, buf->handle, 4*pixel(y, b->width), &val, 4);
}
static void
-partial_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+partial_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
for (int y = 0; y < b->height; y++) {
- uint32_t buf;
- do_or_die(drm_intel_bo_get_subdata(bo, 4*pixel(y, b->width), 4, &buf));
- igt_assert_eq_u32(buf, val);
+ uint32_t tmp;
+
+ gem_read(fd, buf->handle, 4*pixel(y, b->width), &tmp, 4);
+ igt_assert_eq_u32(tmp, val);
}
}
-static drm_intel_bo *
-create_normal_bo(drm_intel_bufmgr *bufmgr, uint64_t size)
+static struct intel_buf *
+create_normal_bo(struct buf_ops *bops, uint32_t width,
+ uint32_t height, uint32_t tiling, uint64_t size)
{
- drm_intel_bo *bo;
+ struct intel_buf *buf;
+ int bpp = size/height/width * 8;
- bo = drm_intel_bo_alloc(bufmgr, "bo", size, 0);
- igt_assert(bo);
+ buf = intel_buf_create(bops, width, height, bpp, 0, tiling, 0);
- return bo;
+ return buf;
}
static void can_create_normal(const struct create *create, unsigned count)
@@ -150,19 +157,26 @@ static void can_create_normal(const struct create *create, unsigned count)
}
#if HAVE_CREATE_PRIVATE
-static drm_intel_bo *
-create_private_bo(drm_intel_bufmgr *bufmgr, uint64_t size)
+static struct intel_buf *
+create_private_bo(buf_ops *bops, uint32_t width, uint32_t height,
+ uint32_t tiling, uint64_t size)
{
- drm_intel_bo *bo;
- uint32_t handle;
+ struct intel_buf *buf;
+ uint32_t handle, buf_handle, name;
+ int bpp = size/height/width * 8;
/* XXX gem_create_with_flags(fd, size, I915_CREATE_PRIVATE); */
handle = gem_create(fd, size);
- bo = gem_handle_to_libdrm_bo(bufmgr, fd, "stolen", handle);
+ name = gem_flink(fd, handle);
+ buf_handle = gem_open(fd, name);
+
+ buf = calloc(1, sizeof(*buf));
+ intel_buf_init_using_handle(bops, buf_handle, buf, width, height,
+ bpp, 0, tiling, 0);
gem_close(fd, handle);
- return bo;
+ return buf;
}
static void can_create_private(const struct create *create, unsigned count)
@@ -172,19 +186,26 @@ static void can_create_private(const struct create *create, unsigned count)
#endif
#if HAVE_CREATE_STOLEN
-static drm_intel_bo *
-create_stolen_bo(drm_intel_bufmgr *bufmgr, uint64_t size)
+static struct intel_buf *
+create_stolen_bo(buf_ops *bops, uint32_t width, uint32_t height,
+ uint32_t tiling, uint64_t size)
{
- drm_intel_bo *bo;
- uint32_t handle;
+ struct intel_buf *buf;
+ uint32_t handle, buf_handle, name;
+ int bpp = size/height/width * 8;
- /* XXX gem_create_with_flags(fd, size, I915_CREATE_STOLEN); */
+ /* XXX gem_create_with_flags(fd, size, I915_CREATE_PRIVATE); */
handle = gem_create(fd, size);
- bo = gem_handle_to_libdrm_bo(bufmgr, fd, "stolen", handle);
+ name = gem_flink(fd, handle);
+ buf_handle = gem_open(fd, name);
+
+ buf = calloc(1, sizeof(*buf));
+ intel_buf_init_using_handle(bops, buf_handle, buf, width, height,
+ bpp, 0, tiling, 0);
gem_close(fd, handle);
- return bo;
+ return buf;
}
static void can_create_stolen(const struct create *create, unsigned count)
@@ -201,10 +222,17 @@ static void create_cpu_require(const struct create *create, unsigned count)
#endif
}
-static drm_intel_bo *
+static struct intel_buf *
+create_bo(const struct buffers *b, uint32_t tiling)
+{
+ return b->create->create(b->bops, b->width, b->height,
+ tiling, 4*b->npixels);
+}
+
+static struct intel_buf *
unmapped_create_bo(const struct buffers *b)
{
- return b->create->create(b->bufmgr, 4*b->npixels);
+ return create_bo(b, I915_TILING_NONE);
}
static void create_snoop_require(const struct create *create, unsigned count)
@@ -213,16 +241,15 @@ static void create_snoop_require(const struct create *create, unsigned count)
igt_require(!gem_has_llc(fd));
}
-static drm_intel_bo *
+static struct intel_buf *
snoop_create_bo(const struct buffers *b)
{
- drm_intel_bo *bo;
+ struct intel_buf *buf;
- bo = unmapped_create_bo(b);
- gem_set_caching(fd, bo->handle, I915_CACHING_CACHED);
- drm_intel_bo_disable_reuse(bo);
+ buf = unmapped_create_bo(b);
+ gem_set_caching(fd, buf->handle, I915_CACHING_CACHED);
- return bo;
+ return buf;
}
static void create_userptr_require(const struct create *create, unsigned count)
@@ -251,11 +278,11 @@ static void create_userptr_require(const struct create *create, unsigned count)
igt_require(has_userptr);
}
-static drm_intel_bo *
+static struct intel_buf *
userptr_create_bo(const struct buffers *b)
{
struct drm_i915_gem_userptr userptr;
- drm_intel_bo *bo;
+ struct intel_buf *buf;
void *ptr;
memset(&userptr, 0, sizeof(userptr));
@@ -266,54 +293,48 @@ userptr_create_bo(const struct buffers *b)
igt_assert(ptr != (void *)-1);
userptr.user_ptr = to_user_pointer(ptr);
-#if 0
do_or_die(drmIoctl(fd, DRM_IOCTL_I915_GEM_USERPTR, &userptr));
- bo = gem_handle_to_libdrm_bo(b->bufmgr, fd, "userptr", userptr.handle);
- gem_close(fd, userptr.handle);
-#else
- bo = drm_intel_bo_alloc_userptr(b->bufmgr, "name",
- ptr, I915_TILING_NONE, 0,
- userptr.user_size, 0);
- igt_assert(bo);
-#endif
- bo->virtual = from_user_pointer(userptr.user_ptr);
+ buf = calloc(1, sizeof(*buf));
+ intel_buf_init_using_handle(b->bops, userptr.handle, buf, b->width,
+ b->height, 32, 0, I915_TILING_NONE, 0);
+
+ buf->ptr = (void *) from_user_pointer(userptr.user_ptr);
- return bo;
+ return buf;
}
static void
-userptr_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+userptr_set_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
int size = b->npixels;
- uint32_t *vaddr = bo->virtual;
+ uint32_t *vaddr = buf->ptr;
- gem_set_domain(fd, bo->handle,
+ gem_set_domain(fd, buf->handle,
I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
while (size--)
*vaddr++ = val;
}
static void
-userptr_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+userptr_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
int size = b->npixels;
- uint32_t *vaddr = bo->virtual;
+ uint32_t *vaddr = buf->ptr;
- gem_set_domain(fd, bo->handle,
+ gem_set_domain(fd, buf->handle,
I915_GEM_DOMAIN_CPU, 0);
while (size--)
igt_assert_eq_u32(*vaddr++, val);
}
static void
-userptr_release_bo(drm_intel_bo *bo)
+userptr_release_bo(struct intel_buf *buf)
{
- igt_assert(bo->virtual);
+ igt_assert(buf->ptr);
- munmap(bo->virtual, bo->size);
- bo->virtual = NULL;
+ munmap(buf->ptr, buf->surface[0].size);
- drm_intel_bo_unreference(bo);
+ intel_buf_destroy(buf);
}
static void create_dmabuf_require(const struct create *create, unsigned count)
@@ -349,13 +370,14 @@ struct dmabuf {
void *map;
};
-static drm_intel_bo *
+static struct intel_buf *
dmabuf_create_bo(const struct buffers *b)
{
struct drm_prime_handle args;
- drm_intel_bo *bo;
+ static struct intel_buf *buf;
struct dmabuf *dmabuf;
int size;
+ uint32_t handle;
size = b->page_size;
@@ -366,9 +388,12 @@ dmabuf_create_bo(const struct buffers *b)
do_ioctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args);
gem_close(fd, args.handle);
+ igt_assert(args.fd != -1);
- bo = drm_intel_bo_gem_create_from_prime(b->bufmgr, args.fd, size);
- igt_assert(bo);
+ handle = prime_fd_to_handle(buf_ops_get_fd(b->bops), args.fd);
+ buf = calloc(1, sizeof(*buf));
+ intel_buf_init_using_handle(b->bops, handle, buf, b->width,
+ b->height, 32, 0, I915_TILING_NONE, 0);
dmabuf = malloc(sizeof(*dmabuf));
igt_assert(dmabuf);
@@ -379,15 +404,15 @@ dmabuf_create_bo(const struct buffers *b)
dmabuf->fd, 0);
igt_assert(dmabuf->map != (void *)-1);
- bo->virtual = dmabuf;
+ buf->ptr = (void *) dmabuf;
- return bo;
+ return buf;
}
static void
-dmabuf_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+dmabuf_set_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
- struct dmabuf *dmabuf = bo->virtual;
+ struct dmabuf *dmabuf = (void *) buf->ptr;
uint32_t *v = dmabuf->map;
int y;
@@ -398,9 +423,9 @@ dmabuf_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
}
static void
-dmabuf_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+dmabuf_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
- struct dmabuf *dmabuf = bo->virtual;
+ struct dmabuf *dmabuf = (void *) buf->ptr;
uint32_t *v = dmabuf->map;
int y;
@@ -411,17 +436,16 @@ dmabuf_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
}
static void
-dmabuf_release_bo(drm_intel_bo *bo)
+dmabuf_release_bo(struct intel_buf *buf)
{
- struct dmabuf *dmabuf = bo->virtual;
+ struct dmabuf *dmabuf = (void *) buf->ptr;
igt_assert(dmabuf);
- munmap(dmabuf->map, bo->size);
+ munmap(dmabuf->map, buf->surface[0].size);
close(dmabuf->fd);
free(dmabuf);
- bo->virtual = NULL;
- drm_intel_bo_unreference(bo);
+ intel_buf_destroy(buf);
}
static bool has_prime_export(int _fd)
@@ -446,13 +470,14 @@ static void create_gtt_require(const struct create *create, unsigned count)
gem_require_mappable_ggtt(fd);
}
-static drm_intel_bo *
+static struct intel_buf *
vgem_create_bo(const struct buffers *b)
{
struct drm_prime_handle args;
- drm_intel_bo *bo;
+ struct intel_buf *buf;
struct vgem_bo vgem;
struct dmabuf *dmabuf;
+ uint32_t handle;
igt_assert(vgem_drv != -1);
@@ -470,8 +495,11 @@ vgem_create_bo(const struct buffers *b)
gem_close(vgem_drv, args.handle);
igt_assert(args.fd != -1);
- bo = drm_intel_bo_gem_create_from_prime(b->bufmgr, args.fd, vgem.size);
- igt_assert(bo);
+ handle = prime_fd_to_handle(buf_ops_get_fd(b->bops), args.fd);
+ buf = calloc(1, sizeof(*buf));
+ intel_buf_init_using_handle(b->bops, handle, buf,
+ vgem.width, vgem.height, vgem.bpp,
+ 0, I915_TILING_NONE, 0);
dmabuf = malloc(sizeof(*dmabuf));
igt_assert(dmabuf);
@@ -482,64 +510,58 @@ vgem_create_bo(const struct buffers *b)
dmabuf->fd, 0);
igt_assert(dmabuf->map != (void *)-1);
- bo->virtual = dmabuf;
+ buf->ptr = (void *) dmabuf;
- return bo;
+ return buf;
}
static void
-gtt_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+gtt_set_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
- uint32_t *vaddr = bo->virtual;
+ uint32_t *vaddr = buf->ptr;
+
+ gem_set_domain(fd, buf->handle,
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
- drm_intel_gem_bo_start_gtt_access(bo, true);
for (int y = 0; y < b->height; y++)
vaddr[pixel(y, b->width)] = val;
}
static void
-gtt_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+gtt_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
- uint32_t *vaddr = bo->virtual;
+ uint32_t *vaddr = buf->ptr;
/* GTT access is slow. So we just compare a few points */
- drm_intel_gem_bo_start_gtt_access(bo, false);
+ gem_set_domain(fd, buf->handle,
+ I915_GEM_DOMAIN_GTT, 0);
+
for (int y = 0; y < b->height; y++)
igt_assert_eq_u32(vaddr[pixel(y, b->width)], val);
}
-static drm_intel_bo *
-map_bo(drm_intel_bo *bo)
+static struct intel_buf *
+map_bo(struct intel_buf *buf)
{
/* gtt map doesn't have a write parameter, so just keep the mapping
* around (to avoid the set_domain with the gtt write domain set) and
* manually tell the kernel when we start access the gtt. */
- do_or_die(drm_intel_gem_bo_map_gtt(bo));
-
- return bo;
-}
-
-static drm_intel_bo *
-tile_bo(drm_intel_bo *bo, int width)
-{
- uint32_t tiling = I915_TILING_X;
- uint32_t stride = width * 4;
-
- do_or_die(drm_intel_bo_set_tiling(bo, &tiling, stride));
+ buf->ptr = gem_mmap__gtt(buf_ops_get_fd(buf->bops), buf->handle,
+ buf->surface[0].size, PROT_READ | PROT_WRITE);
- return bo;
+ return buf;
}
-static drm_intel_bo *
+static struct intel_buf *
gtt_create_bo(const struct buffers *b)
{
return map_bo(unmapped_create_bo(b));
}
-static drm_intel_bo *
+static struct intel_buf *
gttX_create_bo(const struct buffers *b)
{
- return tile_bo(gtt_create_bo(b), b->width);
+ return map_bo(create_bo(b, I915_TILING_X));
}
static void bit17_require(void)
@@ -574,85 +596,83 @@ wc_create_require(const struct create *create, unsigned count)
wc_require();
}
-static drm_intel_bo *
+static struct intel_buf *
wc_create_bo(const struct buffers *b)
{
- drm_intel_bo *bo;
+ static struct intel_buf *buf;
- bo = unmapped_create_bo(b);
- bo->virtual = gem_mmap__wc(fd, bo->handle, 0, bo->size, PROT_READ | PROT_WRITE);
- return bo;
+ buf = unmapped_create_bo(b);
+ buf->ptr = gem_mmap__wc(fd, buf->handle, 0, buf->surface[0].size,
+ PROT_READ | PROT_WRITE);
+ return buf;
}
static void
-wc_release_bo(drm_intel_bo *bo)
+wc_release_bo(struct intel_buf *buf)
{
- igt_assert(bo->virtual);
+ igt_assert(buf->ptr);
- munmap(bo->virtual, bo->size);
- bo->virtual = NULL;
+ munmap(buf->ptr, buf->surface[0].size);
+ buf->ptr = 0;
- nop_release_bo(bo);
+ nop_release_bo(buf);
}
-static drm_intel_bo *
+static struct intel_buf *
gpu_create_bo(const struct buffers *b)
{
return unmapped_create_bo(b);
}
-static drm_intel_bo *
+static struct intel_buf *
gpuX_create_bo(const struct buffers *b)
{
- return tile_bo(gpu_create_bo(b), b->width);
+ return create_bo(b, I915_TILING_X);
}
static void
-cpu_set_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+cpu_set_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
int size = b->npixels;
uint32_t *vaddr;
- do_or_die(drm_intel_bo_map(bo, true));
- vaddr = bo->virtual;
+ intel_buf_cpu_map(buf, true);
+ vaddr = buf->ptr;
while (size--)
*vaddr++ = val;
- drm_intel_bo_unmap(bo);
+ intel_buf_unmap(buf);
}
static void
-cpu_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+cpu_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
int size = b->npixels;
uint32_t *vaddr;
- do_or_die(drm_intel_bo_map(bo, false));
- vaddr = bo->virtual;
+ intel_buf_cpu_map(buf, false);
+ vaddr = buf->ptr;
while (size--)
igt_assert_eq_u32(*vaddr++, val);
- drm_intel_bo_unmap(bo);
+ intel_buf_unmap(buf);
}
static void
-gpu_set_bo(struct buffers *buffers, drm_intel_bo *bo, uint32_t val)
+gpu_set_bo(struct buffers *buffers, struct intel_buf *buf, uint32_t val)
{
struct drm_i915_gem_relocation_entry reloc[1];
struct drm_i915_gem_exec_object2 gem_exec[2];
struct drm_i915_gem_execbuffer2 execbuf;
- uint32_t buf[10], *b;
- uint32_t tiling, swizzle;
-
- drm_intel_bo_get_tiling(bo, &tiling, &swizzle);
+ uint32_t tmp[10], *b;
memset(reloc, 0, sizeof(reloc));
memset(gem_exec, 0, sizeof(gem_exec));
memset(&execbuf, 0, sizeof(execbuf));
- b = buf;
+ b = tmp;
*b++ = XY_COLOR_BLT_CMD_NOLEN |
((gen >= 8) ? 5 : 4) |
COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
- if (gen >= 4 && tiling) {
+ if (gen >= 4 && buf->tiling) {
b[-1] |= XY_COLOR_BLT_TILED;
*b = buffers->width;
} else
@@ -660,8 +680,8 @@ gpu_set_bo(struct buffers *buffers, drm_intel_bo *bo, uint32_t val)
*b++ |= 0xf0 << 16 | 1 << 25 | 1 << 24;
*b++ = 0;
*b++ = buffers->height << 16 | buffers->width;
- reloc[0].offset = (b - buf) * sizeof(uint32_t);
- reloc[0].target_handle = bo->handle;
+ reloc[0].offset = (b - tmp) * sizeof(uint32_t);
+ reloc[0].target_handle = buf->handle;
reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
*b++ = 0;
@@ -669,10 +689,10 @@ gpu_set_bo(struct buffers *buffers, drm_intel_bo *bo, uint32_t val)
*b++ = 0;
*b++ = val;
*b++ = MI_BATCH_BUFFER_END;
- if ((b - buf) & 1)
+ if ((b - tmp) & 1)
*b++ = 0;
- gem_exec[0].handle = bo->handle;
+ gem_exec[0].handle = buf->handle;
gem_exec[0].flags = EXEC_OBJECT_NEEDS_FENCE;
gem_exec[1].handle = gem_create(fd, 4096);
@@ -681,30 +701,30 @@ gpu_set_bo(struct buffers *buffers, drm_intel_bo *bo, uint32_t val)
execbuf.buffers_ptr = to_user_pointer(gem_exec);
execbuf.buffer_count = 2;
- execbuf.batch_len = (b - buf) * sizeof(buf[0]);
+ execbuf.batch_len = (b - tmp) * sizeof(tmp[0]);
if (gen >= 6)
execbuf.flags = I915_EXEC_BLT;
- gem_write(fd, gem_exec[1].handle, 0, buf, execbuf.batch_len);
+ gem_write(fd, gem_exec[1].handle, 0, tmp, execbuf.batch_len);
gem_execbuf(fd, &execbuf);
gem_close(fd, gem_exec[1].handle);
}
static void
-gpu_cmp_bo(struct buffers *b, drm_intel_bo *bo, uint32_t val)
+gpu_cmp_bo(struct buffers *b, struct intel_buf *buf, uint32_t val)
{
- blt_copy_bo(b, b->snoop, bo);
+ blt_copy_bo(b, b->snoop, buf);
cpu_cmp_bo(b, b->snoop, val);
}
struct access_mode {
const char *name;
void (*require)(const struct create *, unsigned);
- drm_intel_bo *(*create_bo)(const struct buffers *b);
- void (*set_bo)(struct buffers *b, drm_intel_bo *bo, uint32_t val);
- void (*cmp_bo)(struct buffers *b, drm_intel_bo *bo, uint32_t val);
- void (*release_bo)(drm_intel_bo *bo);
+ struct intel_buf *(*create_bo)(const struct buffers *b);
+ void (*set_bo)(struct buffers *b, struct intel_buf *buf, uint32_t val);
+ void (*cmp_bo)(struct buffers *b, struct intel_buf *buf, uint32_t val);
+ void (*release_bo)(struct intel_buf *buf);
};
igt_render_copyfunc_t rendercopy;
@@ -745,7 +765,7 @@ static void buffers_init(struct buffers *b,
const struct access_mode *mode,
const struct size *size,
int num_buffers,
- int _fd, int enable_reuse)
+ int _fd)
{
memset(b, 0, sizeof(*b));
b->name = name;
@@ -763,17 +783,13 @@ static void buffers_init(struct buffers *b,
b->tmp = malloc(b->page_size);
igt_assert(b->tmp);
- b->bufmgr = drm_intel_bufmgr_gem_init(_fd, 4096);
- igt_assert(b->bufmgr);
+ b->bops = buf_ops_create(_fd);
- b->src = malloc(2*sizeof(drm_intel_bo *)*num_buffers);
+ b->src = malloc(2*sizeof(struct intel_buf *)*num_buffers);
igt_assert(b->src);
b->dst = b->src + num_buffers;
- if (enable_reuse)
- drm_intel_bufmgr_gem_enable_reuse(b->bufmgr);
- b->batch = intel_batchbuffer_alloc(b->bufmgr, devid);
- igt_assert(b->batch);
+ b->ibb = intel_bb_create(_fd, 4096);
}
static void buffers_destroy(struct buffers *b)
@@ -809,7 +825,7 @@ static void buffers_destroy(struct buffers *b)
static void buffers_create(struct buffers *b)
{
int count = b->num_buffers;
- igt_assert(b->bufmgr);
+ igt_assert(b->bops);
buffers_destroy(b);
igt_assert(b->count == 0);
@@ -823,20 +839,15 @@ static void buffers_create(struct buffers *b)
b->snoop = snoop_create_bo(b);
}
-static void buffers_reset(struct buffers *b, bool enable_reuse)
+static void buffers_reset(struct buffers *b)
{
- b->bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- igt_assert(b->bufmgr);
-
- if (enable_reuse)
- drm_intel_bufmgr_gem_enable_reuse(b->bufmgr);
- b->batch = intel_batchbuffer_alloc(b->bufmgr, devid);
- igt_assert(b->batch);
+ b->bops = buf_ops_create(fd);
+ b->ibb = intel_bb_create(fd, 4096);
}
static void buffers_fini(struct buffers *b)
{
- if (b->bufmgr == NULL)
+ if (b->bops == NULL)
return;
buffers_destroy(b);
@@ -844,58 +855,47 @@ static void buffers_fini(struct buffers *b)
free(b->tmp);
free(b->src);
- intel_batchbuffer_free(b->batch);
- drm_intel_bufmgr_destroy(b->bufmgr);
+ intel_bb_destroy(b->ibb);
+ buf_ops_destroy(b->bops);
memset(b, 0, sizeof(*b));
}
-typedef void (*do_copy)(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src);
+typedef void (*do_copy)(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src);
typedef igt_hang_t (*do_hang)(void);
-static void render_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
+static void render_copy_bo(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src)
{
- struct igt_buf d = {
- .bo = dst,
- .num_tiles = b->npixels * 4,
- .surface[0] = {
- .size = b->npixels * 4, .stride = b->width * 4,
- },
- .bpp = 32,
- }, s = {
- .bo = src,
- .num_tiles = b->npixels * 4,
- .surface[0] = {
- .size = b->npixels * 4, .stride = b->width * 4,
- },
- .bpp = 32,
- };
- uint32_t swizzle;
-
- drm_intel_bo_get_tiling(dst, &d.tiling, &swizzle);
- drm_intel_bo_get_tiling(src, &s.tiling, &swizzle);
-
- rendercopy(b->batch, NULL,
- &s, 0, 0,
+ rendercopy(b->ibb, 0,
+ src, 0, 0,
b->width, b->height,
- &d, 0, 0);
+ dst, 0, 0);
+ intel_bb_sync(b->ibb);
+ intel_bb_reset(b->ibb, true);
}
-static void blt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
+static void blt_copy_bo(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src)
{
- intel_blt_copy(b->batch,
+ intel_bb_blt_copy(b->ibb,
src, 0, 0, 4*b->width,
dst, 0, 0, 4*b->width,
b->width, b->height, 32);
+ intel_bb_sync(b->ibb);
+ intel_bb_reset(b->ibb, true);
}
-static void cpu_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
+static void cpu_copy_bo(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src)
{
const int size = b->page_size;
void *d, *s;
gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_CPU, 0);
- gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_CPU,
+ I915_GEM_DOMAIN_CPU);
s = gem_mmap__cpu(fd, src->handle, 0, size, PROT_READ);
d = gem_mmap__cpu(fd, dst->handle, 0, size, PROT_WRITE);
@@ -905,13 +905,15 @@ static void cpu_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
munmap(s, size);
}
-static void gtt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
+static void gtt_copy_bo(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src)
{
const int size = b->page_size;
void *d, *s;
gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_GTT, 0);
- gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_GTT,
+ I915_GEM_DOMAIN_GTT);
s = gem_mmap__gtt(fd, src->handle, size, PROT_READ);
d = gem_mmap__gtt(fd, dst->handle, size, PROT_WRITE);
@@ -922,13 +924,15 @@ static void gtt_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
munmap(s, size);
}
-static void wc_copy_bo(struct buffers *b, drm_intel_bo *dst, drm_intel_bo *src)
+static void wc_copy_bo(struct buffers *b, struct intel_buf *dst,
+ struct intel_buf *src)
{
const int size = b->page_size;
void *d, *s;
gem_set_domain(fd, src->handle, I915_GEM_DOMAIN_WC, 0);
- gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
+ gem_set_domain(fd, dst->handle, I915_GEM_DOMAIN_WC,
+ I915_GEM_DOMAIN_WC);
s = gem_mmap__wc(fd, src->handle, 0, size, PROT_READ);
d = gem_mmap__wc(fd, dst->handle, 0, size, PROT_WRITE);
@@ -1353,10 +1357,10 @@ static void __run_forked(struct buffers *buffers,
do_hang do_hang_func)
{
- /* purge the libdrm caches before cloing the process */
+ /* purge the caches before cloing the process */
buffers_destroy(buffers);
- intel_batchbuffer_free(buffers->batch);
- drm_intel_bufmgr_destroy(buffers->bufmgr);
+ intel_bb_destroy(buffers->ibb);
+ buf_ops_destroy(buffers->bops);
igt_fork(child, num_children) {
int num_buffers;
@@ -1369,7 +1373,7 @@ static void __run_forked(struct buffers *buffers,
if (num_buffers < buffers->num_buffers)
buffers->num_buffers = num_buffers;
- buffers_reset(buffers, true);
+ buffers_reset(buffers);
buffers_create(buffers);
igt_while_interruptible(interrupt) {
@@ -1382,7 +1386,7 @@ static void __run_forked(struct buffers *buffers,
igt_waitchildren();
igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
- buffers_reset(buffers, true);
+ buffers_reset(buffers);
}
static void run_forked(struct buffers *buffers,
@@ -1459,8 +1463,7 @@ run_mode(const char *prefix,
igt_fixture
buffers_init(&buffers, prefix, create, mode,
- size, num_buffers,
- fd, run_wrap_func != run_child);
+ size, num_buffers, fd);
for (h = hangs; h->suffix; h++) {
if (!all && *h->suffix)
diff --git a/tests/i915/gem_ppgtt.c b/tests/i915/gem_ppgtt.c
index 8c02e4af..d56e808e 100644
--- a/tests/i915/gem_ppgtt.c
+++ b/tests/i915/gem_ppgtt.c
@@ -38,56 +38,46 @@
#include "i915/gem.h"
#include "igt.h"
#include "igt_debugfs.h"
-#include "intel_bufmgr.h"
#define WIDTH 512
#define STRIDE (WIDTH*4)
#define HEIGHT 512
#define SIZE (HEIGHT*STRIDE)
-static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr,
- uint32_t pixel)
+static struct intel_buf *create_bo(struct buf_ops *bops, uint32_t pixel)
{
uint64_t value = (uint64_t)pixel << 32 | pixel, *v;
- drm_intel_bo *bo;
+ struct intel_buf *buf;
- bo = drm_intel_bo_alloc(bufmgr, "surface", SIZE, 4096);
- igt_assert(bo);
+ buf = intel_buf_create(bops, WIDTH, HEIGHT, 32, 0, I915_TILING_NONE, 0);
+ v = intel_buf_cpu_map(buf, 1);
- do_or_die(drm_intel_bo_map(bo, 1));
- v = bo->virtual;
for (int i = 0; i < SIZE / sizeof(value); i += 8) {
v[i + 0] = value; v[i + 1] = value;
v[i + 2] = value; v[i + 3] = value;
v[i + 4] = value; v[i + 5] = value;
v[i + 6] = value; v[i + 7] = value;
}
- drm_intel_bo_unmap(bo);
+ intel_buf_unmap(buf);
- return bo;
+ return buf;
}
-static void scratch_buf_init(struct igt_buf *buf,
- drm_intel_bufmgr *bufmgr,
- uint32_t pixel)
+static void cleanup_bufs(struct intel_buf **buf, int count)
{
- memset(buf, 0, sizeof(*buf));
+ for (int child = 0; child < count; child++) {
+ struct buf_ops *bops = buf[child]->bops;
+ int fd = buf_ops_get_fd(buf[child]->bops);
- buf->bo = create_bo(bufmgr, pixel);
- buf->surface[0].stride = STRIDE;
- buf->tiling = I915_TILING_NONE;
- buf->surface[0].size = SIZE;
- buf->bpp = 32;
-}
+ intel_buf_destroy(buf[child]);
+ buf_ops_destroy(bops);
+ close(fd);
+ }
-static void scratch_buf_fini(struct igt_buf *buf)
-{
- drm_intel_bo_unreference(buf->bo);
- memset(buf, 0, sizeof(*buf));
}
static void fork_rcs_copy(int timeout, uint32_t final,
- drm_intel_bo **dst, int count,
+ struct intel_buf **dst, int count,
unsigned flags)
#define CREATE_CONTEXT 0x1
{
@@ -102,21 +92,13 @@ static void fork_rcs_copy(int timeout, uint32_t final,
for (int child = 0; child < count; child++) {
int fd = drm_open_driver(DRIVER_INTEL);
- drm_intel_bufmgr *bufmgr;
+ struct buf_ops *bops;
devid = intel_get_drm_devid(fd);
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- igt_assert(bufmgr);
-
- dst[child] = create_bo(bufmgr, ~0);
+ bops = buf_ops_create(fd);
- if (flags & CREATE_CONTEXT) {
- drm_intel_context *ctx;
-
- ctx = drm_intel_gem_context_create(dst[child]->bufmgr);
- igt_require(ctx);
- }
+ dst[child] = create_bo(bops, ~0);
render_copy = igt_get_render_copyfunc(devid);
igt_require_f(render_copy,
@@ -124,113 +106,106 @@ static void fork_rcs_copy(int timeout, uint32_t final,
}
igt_fork(child, count) {
- struct intel_batchbuffer *batch;
- struct igt_buf buf = {};
- struct igt_buf src;
+ struct intel_bb *ibb;
+ uint32_t ctx = 0;
+ struct intel_buf *src;
unsigned long i;
- batch = intel_batchbuffer_alloc(dst[child]->bufmgr,
- devid);
- igt_assert(batch);
-
- if (flags & CREATE_CONTEXT) {
- drm_intel_context *ctx;
+ ibb = intel_bb_create(buf_ops_get_fd(dst[child]->bops), 4096);
- ctx = drm_intel_gem_context_create(dst[child]->bufmgr);
- intel_batchbuffer_set_context(batch, ctx);
- }
-
- buf.bo = dst[child];
- buf.surface[0].stride = STRIDE;
- buf.tiling = I915_TILING_NONE;
- buf.surface[0].size = SIZE;
- buf.bpp = 32;
+ if (flags & CREATE_CONTEXT)
+ ctx = gem_context_create(buf_ops_get_fd(dst[child]->bops));
i = 0;
igt_until_timeout(timeout) {
- scratch_buf_init(&src, dst[child]->bufmgr,
- i++ | child << 16);
- render_copy(batch, NULL,
- &src, 0, 0,
+ src = create_bo(dst[child]->bops,
+ i++ | child << 16);
+ render_copy(ibb, ctx,
+ src, 0, 0,
WIDTH, HEIGHT,
- &buf, 0, 0);
- scratch_buf_fini(&src);
+ dst[child], 0, 0);
+
+ intel_buf_destroy(src);
}
- scratch_buf_init(&src, dst[child]->bufmgr,
- final | child << 16);
- render_copy(batch, NULL,
- &src, 0, 0,
+ src = create_bo(dst[child]->bops,
+ final | child << 16);
+ render_copy(ibb, ctx,
+ src, 0, 0,
WIDTH, HEIGHT,
- &buf, 0, 0);
- scratch_buf_fini(&src);
+ dst[child], 0, 0);
+ intel_bb_sync(ibb);
+
+ intel_buf_destroy(src);
+
+ intel_bb_destroy(ibb);
}
}
static void fork_bcs_copy(int timeout, uint32_t final,
- drm_intel_bo **dst, int count)
+ struct intel_buf **dst, int count)
{
- int devid;
-
for (int child = 0; child < count; child++) {
- drm_intel_bufmgr *bufmgr;
+ struct buf_ops *bops;
int fd = drm_open_driver(DRIVER_INTEL);
- devid = intel_get_drm_devid(fd);
-
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- igt_assert(bufmgr);
-
- dst[child] = create_bo(bufmgr, ~0);
+ bops = buf_ops_create(fd);
+ dst[child] = create_bo(bops, ~0);
}
igt_fork(child, count) {
- struct intel_batchbuffer *batch;
- drm_intel_bo *src[2];
+ struct intel_buf *src[2];
+ struct intel_bb *ibb;
unsigned long i;
-
- batch = intel_batchbuffer_alloc(dst[child]->bufmgr,
- devid);
- igt_assert(batch);
+ ibb = intel_bb_create(buf_ops_get_fd(dst[child]->bops), 4096);
i = 0;
igt_until_timeout(timeout) {
- src[0] = create_bo(dst[child]->bufmgr,
+ src[0] = create_bo(dst[child]->bops,
~0);
- src[1] = create_bo(dst[child]->bufmgr,
+ src[1] = create_bo(dst[child]->bops,
i++ | child << 16);
- intel_copy_bo(batch, src[0], src[1], SIZE);
- intel_copy_bo(batch, dst[child], src[0], SIZE);
+ intel_bb_blt_copy(ibb, src[1], 0, 0, 4096,
+ src[0], 0, 0, 4096,
+ 4096/4, SIZE/4096, 32);
+ intel_bb_blt_copy(ibb, src[0], 0, 0, 4096,
+ dst[child], 0, 0, 4096,
+ 4096/4, SIZE/4096, 32);
- drm_intel_bo_unreference(src[1]);
- drm_intel_bo_unreference(src[0]);
+ intel_buf_destroy(src[1]);
+ intel_buf_destroy(src[0]);
}
- src[0] = create_bo(dst[child]->bufmgr,
- ~0);
- src[1] = create_bo(dst[child]->bufmgr,
+ src[0] = create_bo(dst[child]->bops, ~0);
+ src[1] = create_bo(dst[child]->bops,
final | child << 16);
- intel_copy_bo(batch, src[0], src[1], SIZE);
- intel_copy_bo(batch, dst[child], src[0], SIZE);
+ intel_bb_blt_copy(ibb, src[1], 0, 0, 4096,
+ src[0], 0, 0, 4096,
+ 4096/4, SIZE/4096, 32);
+ intel_bb_blt_copy(ibb, src[0], 0, 0, 4096,
+ dst[child], 0, 0, 4096,
+ 4096/4, SIZE/4096, 32);
+ intel_bb_sync(ibb);
+
+ intel_buf_destroy(src[1]);
+ intel_buf_destroy(src[0]);
- drm_intel_bo_unreference(src[1]);
- drm_intel_bo_unreference(src[0]);
+ intel_bb_destroy(ibb);
}
}
-static void surfaces_check(drm_intel_bo **bo, int count, uint32_t expected)
+static void surfaces_check(struct intel_buf **buf, int count, uint32_t expected)
{
for (int child = 0; child < count; child++) {
uint32_t *ptr;
- do_or_die(drm_intel_bo_map(bo[child], 0));
- ptr = bo[child]->virtual;
+ ptr = intel_buf_cpu_map(buf[child], 0);
for (int j = 0; j < SIZE/4; j++)
igt_assert_eq(ptr[j], expected | child << 16);
- drm_intel_bo_unmap(bo[child]);
+ intel_buf_unmap(buf[child]);
}
}
@@ -301,7 +276,7 @@ igt_main
}
igt_subtest("blt-vs-render-ctx0") {
- drm_intel_bo *bcs[1], *rcs[N_CHILD];
+ struct intel_buf *bcs[1], *rcs[N_CHILD];
fork_bcs_copy(30, 0x4000, bcs, 1);
fork_rcs_copy(30, 0x8000 / N_CHILD, rcs, N_CHILD, 0);
@@ -310,10 +285,13 @@ igt_main
surfaces_check(bcs, 1, 0x4000);
surfaces_check(rcs, N_CHILD, 0x8000 / N_CHILD);
+
+ cleanup_bufs(bcs, 1);
+ cleanup_bufs(rcs, N_CHILD);
}
igt_subtest("blt-vs-render-ctxN") {
- drm_intel_bo *bcs[1], *rcs[N_CHILD];
+ struct intel_buf *bcs[1], *rcs[N_CHILD];
fork_rcs_copy(30, 0x8000 / N_CHILD, rcs, N_CHILD, CREATE_CONTEXT);
fork_bcs_copy(30, 0x4000, bcs, 1);
@@ -322,6 +300,9 @@ igt_main
surfaces_check(bcs, 1, 0x4000);
surfaces_check(rcs, N_CHILD, 0x8000 / N_CHILD);
+
+ cleanup_bufs(bcs, 1);
+ cleanup_bufs(rcs, N_CHILD);
}
igt_subtest("flink-and-close-vma-leak")
diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
index 70b9b05f..ffd655b0 100644
--- a/tests/kms_draw_crc.c
+++ b/tests/kms_draw_crc.c
@@ -38,7 +38,7 @@ struct modeset_params {
int drm_fd;
drmModeResPtr drm_res;
drmModeConnectorPtr drm_connectors[MAX_CONNECTORS];
-drm_intel_bufmgr *bufmgr;
+struct buf_ops *bops;
igt_pipe_crc_t *pipe_crc;
#define N_FORMATS 3
@@ -126,23 +126,23 @@ static void get_method_crc(enum igt_draw_method method, uint32_t drm_format,
igt_create_fb(drm_fd, ms.mode->hdisplay, ms.mode->vdisplay,
drm_format, tiling, &fb);
- igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method,
+ igt_draw_rect_fb(drm_fd, bops, 0, &fb, method,
0, 0, fb.width, fb.height,
get_color(drm_format, 0, 0, 1));
- igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method,
+ igt_draw_rect_fb(drm_fd, bops, 0, &fb, method,
fb.width / 4, fb.height / 4,
fb.width / 2, fb.height / 2,
get_color(drm_format, 0, 1, 0));
- igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method,
+ igt_draw_rect_fb(drm_fd, bops, 0, &fb, method,
fb.width / 8, fb.height / 8,
fb.width / 4, fb.height / 4,
get_color(drm_format, 1, 0, 0));
- igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method,
+ igt_draw_rect_fb(drm_fd, bops, 0, &fb, method,
fb.width / 2, fb.height / 2,
fb.width / 3, fb.height / 3,
get_color(drm_format, 1, 0, 1));
- igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb, method, 1, 1, 15, 15,
+ igt_draw_rect_fb(drm_fd, bops, 0, &fb, method, 1, 1, 15, 15,
get_color(drm_format, 0, 1, 1));
rc = drmModeSetCrtc(drm_fd, ms.crtc_id, fb.fb_id, 0, 0,
@@ -228,7 +228,7 @@ static void fill_fb_subtest(void)
igt_create_fb(drm_fd, ms.mode->hdisplay, ms.mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, &fb);
- igt_draw_rect_fb(drm_fd, bufmgr, NULL, &fb,
+ igt_draw_rect_fb(drm_fd, bops, 0, &fb,
gem_has_mappable_ggtt(drm_fd) ? IGT_DRAW_MMAP_GTT :
IGT_DRAW_MMAP_WC,
0, 0, fb.width, fb.height, 0xFF);
@@ -270,9 +270,7 @@ static void setup_environment(void)
kmstest_set_vt_graphics_mode();
- bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
- igt_assert(bufmgr);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+ bops = buf_ops_create(drm_fd);
find_modeset_params();
pipe_crc = igt_pipe_crc_new(drm_fd, kmstest_get_crtc_idx(drm_res, ms.crtc_id),
@@ -285,7 +283,7 @@ static void teardown_environment(void)
igt_pipe_crc_free(pipe_crc);
- drm_intel_bufmgr_destroy(bufmgr);
+ buf_ops_destroy(bops);
for (i = 0; i < drm_res->count_connectors; i++)
drmModeFreeConnector(drm_connectors[i]);
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 780fecfe..14f522d8 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -166,7 +166,7 @@ struct {
int debugfs;
igt_display_t display;
- drm_intel_bufmgr *bufmgr;
+ struct buf_ops *bops;
} drm;
struct {
@@ -1091,7 +1091,7 @@ static void draw_rect(struct draw_pattern_info *pattern, struct fb_region *fb,
{
struct rect rect = pattern->get_rect(fb, r);
- igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, fb->fb, method,
+ igt_draw_rect_fb(drm.fd, drm.bops, 0, fb->fb, method,
fb->x + rect.x, fb->y + rect.y,
rect.w, rect.h, rect.color);
@@ -1117,7 +1117,7 @@ static void fill_fb_region(struct fb_region *region, enum color ecolor)
{
uint32_t color = pick_color(region->fb, ecolor);
- igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, region->fb, IGT_DRAW_BLT,
+ igt_draw_rect_fb(drm.fd, drm.bops, 0, region->fb, IGT_DRAW_BLT,
region->x, region->y, region->w, region->h,
color);
}
@@ -1141,7 +1141,7 @@ static bool disable_features(const struct test_mode *t)
static void *busy_thread_func(void *data)
{
while (!busy_thread.stop)
- igt_draw_rect(drm.fd, drm.bufmgr, NULL, busy_thread.handle,
+ igt_draw_rect(drm.fd, drm.bops, 0, busy_thread.handle,
busy_thread.size, busy_thread.stride,
busy_thread.tiling, IGT_DRAW_BLT, 0, 0,
busy_thread.width, busy_thread.height,
@@ -1288,14 +1288,12 @@ static void setup_drm(void)
kmstest_set_vt_graphics_mode();
igt_display_require(&drm.display, drm.fd);
- drm.bufmgr = drm_intel_bufmgr_gem_init(drm.fd, 4096);
- igt_assert(drm.bufmgr);
- drm_intel_bufmgr_gem_enable_reuse(drm.bufmgr);
+ drm.bops = buf_ops_create(drm.fd);
}
static void teardown_drm(void)
{
- drm_intel_bufmgr_destroy(drm.bufmgr);
+ buf_ops_destroy(drm.bops);
igt_display_fini(&drm.display);
close(drm.fd);
}
@@ -2622,14 +2620,14 @@ static void scaledprimary_subtest(const struct test_mode *t)
t->tiling, t->plane, &new_fb);
fill_fb(&new_fb, COLOR_BLUE);
- igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method,
+ igt_draw_rect_fb(drm.fd, drm.bops, 0, &new_fb, t->method,
reg->x, reg->y, reg->w / 2, reg->h / 2,
pick_color(&new_fb, COLOR_GREEN));
- igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method,
+ igt_draw_rect_fb(drm.fd, drm.bops, 0, &new_fb, t->method,
reg->x + reg->w / 2, reg->y + reg->h / 2,
reg->w / 2, reg->h / 2,
pick_color(&new_fb, COLOR_RED));
- igt_draw_rect_fb(drm.fd, drm.bufmgr, NULL, &new_fb, t->method,
+ igt_draw_rect_fb(drm.fd, drm.bops, 0, &new_fb, t->method,
reg->x + reg->w / 2, reg->y + reg->h / 2,
reg->w / 4, reg->h / 4,
pick_color(&new_fb, COLOR_MAGENTA));
diff --git a/tests/kms_psr.c b/tests/kms_psr.c
index 49ea446a..d2c5c540 100644
--- a/tests/kms_psr.c
+++ b/tests/kms_psr.c
@@ -29,7 +29,6 @@
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
-#include "intel_bufmgr.h"
enum operations {
PAGE_FLIP,
@@ -65,7 +64,7 @@ typedef struct {
uint32_t devid;
uint32_t crtc_id;
igt_display_t display;
- drm_intel_bufmgr *bufmgr;
+ struct buf_ops *bops;
struct igt_fb fb_green, fb_white;
igt_plane_t *test_plane;
int mod_size;
@@ -123,73 +122,91 @@ static void display_fini(data_t *data)
igt_display_fini(&data->display);
}
-static void fill_blt(data_t *data, uint32_t handle, unsigned char color)
+static void color_blit_start(struct intel_bb *ibb)
{
- drm_intel_bo *dst = gem_handle_to_libdrm_bo(data->bufmgr,
- data->drm_fd,
- "", handle);
- struct intel_batchbuffer *batch;
-
- batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
- igt_assert(batch);
-
- COLOR_BLIT_COPY_BATCH_START(0);
- OUT_BATCH((1 << 24) | (0xf0 << 16) | 0);
- OUT_BATCH(0);
- OUT_BATCH(0xfff << 16 | 0xfff);
- OUT_RELOC(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(color);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
- intel_batchbuffer_free(batch);
-
- gem_bo_busy(data->drm_fd, handle);
+ intel_bb_out(ibb, XY_COLOR_BLT_CMD_NOLEN |
+ COLOR_BLT_WRITE_ALPHA |
+ XY_COLOR_BLT_WRITE_RGB |
+ (4 + (ibb->gen >= 8)));
}
-static void scratch_buf_init(struct igt_buf *buf, drm_intel_bo *bo,
- int size, int stride)
+static struct intel_buf *create_buf_from_fb(data_t *data,
+ const struct igt_fb *fb)
{
- memset(buf, 0, sizeof(*buf));
+ uint32_t name, handle, tiling, stride, width, height, bpp, size;
+ struct intel_buf *buf;
+
+ igt_assert_eq(fb->offsets[0], 0);
+
+ tiling = igt_fb_mod_to_tiling(fb->modifier);
+ stride = fb->strides[0];
+ bpp = fb->plane_bpp[0];
+ size = fb->size;
+ width = stride / (bpp / 8);
+ height = size / stride;
+
+ buf = calloc(1, sizeof(*buf));
+ igt_assert(buf);
+
+ name = gem_flink(data->drm_fd, fb->gem_handle);
+ handle = gem_open(data->drm_fd, name);
+ intel_buf_init_using_handle(data->bops, handle, buf,
+ width, height, bpp, 0, tiling, 0);
+ return buf;
+}
- buf->bo = bo;
- buf->surface[0].stride = stride;
- buf->tiling = I915_TILING_X;
- buf->surface[0].size = size;
- buf->bpp = 32;
+static void fill_blt(data_t *data, const struct igt_fb *fb, unsigned char color)
+{
+ struct intel_bb *ibb;
+ struct intel_buf *dst;
+
+ ibb = intel_bb_create(data->drm_fd, 4096);
+ dst = create_buf_from_fb(data, fb);
+
+ color_blit_start(ibb);
+ intel_bb_out(ibb, (1 << 24) | (0xf0 << 16) | 0);
+ intel_bb_out(ibb, 0);
+ intel_bb_out(ibb, 0xfff << 16 | 0xfff);
+ intel_bb_emit_reloc(ibb, dst->handle, I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER, 0, 0x0);
+ intel_bb_out(ibb, color);
+
+ intel_bb_flush_blit(ibb);
+ intel_bb_sync(ibb);
+ intel_bb_destroy(ibb);
+ intel_buf_destroy(dst);
}
-static void fill_render(data_t *data, uint32_t handle, unsigned char color)
+static void fill_render(data_t *data, const struct igt_fb *fb,
+ unsigned char color)
{
- drm_intel_bo *src, *dst;
- struct intel_batchbuffer *batch;
- struct igt_buf src_buf, dst_buf;
+ struct intel_buf *src, *dst;
+ struct intel_bb *ibb;
const uint8_t buf[4] = { color, color, color, color };
igt_render_copyfunc_t rendercopy = igt_get_render_copyfunc(data->devid);
+ int height, width, tiling;
igt_skip_on(!rendercopy);
- dst = gem_handle_to_libdrm_bo(data->bufmgr, data->drm_fd, "", handle);
- igt_assert(dst);
+ ibb = intel_bb_create(data->drm_fd, 4096);
+ dst = create_buf_from_fb(data, fb);
- src = drm_intel_bo_alloc(data->bufmgr, "", data->mod_size, 4096);
- igt_assert(src);
+ width = fb->strides[0] / (fb->plane_bpp[0] / 8);
+ height = fb->size / fb->strides[0];
+ tiling = igt_fb_mod_to_tiling(fb->modifier);
+ src = intel_buf_create(data->bops, width, height, fb->plane_bpp[0],
+ 0, tiling, 0);
gem_write(data->drm_fd, src->handle, 0, buf, 4);
- scratch_buf_init(&src_buf, src, data->mod_size, data->mod_stride);
- scratch_buf_init(&dst_buf, dst, data->mod_size, data->mod_stride);
-
- batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
- igt_assert(batch);
-
- rendercopy(batch, NULL,
- &src_buf, 0, 0, 0xff, 0xff,
- &dst_buf, 0, 0);
+ rendercopy(ibb, 0,
+ src, 0, 0, 0xff, 0xff,
+ dst, 0, 0);
- intel_batchbuffer_free(batch);
-
- gem_bo_busy(data->drm_fd, handle);
+ intel_bb_sync(ibb);
+ intel_bb_destroy(ibb);
+ intel_buf_destroy(src);
+ intel_buf_destroy(dst);
}
static bool sink_support(data_t *data, enum psr_mode mode)
@@ -290,11 +307,11 @@ static void run_test(data_t *data)
expected = "BLACK or TRANSPARENT mark on top of plane in test";
break;
case BLT:
- fill_blt(data, handle, 0);
+ fill_blt(data, &data->fb_white, 0);
expected = "BLACK or TRANSPARENT mark on top of plane in test";
break;
case RENDER:
- fill_render(data, handle, 0);
+ fill_render(data, &data->fb_white, 0);
expected = "BLACK or TRANSPARENT mark on top of plane in test";
break;
case PLANE_MOVE:
@@ -314,7 +331,8 @@ static void run_test(data_t *data)
manual(expected);
}
-static void test_cleanup(data_t *data) {
+static void test_cleanup(data_t *data)
+{
igt_plane_t *primary;
primary = igt_output_get_plane_type(data->output,
@@ -444,11 +462,7 @@ igt_main_args("", long_options, help_str, opt_handler, &data)
"Sink does not support PSR\n");
data.supports_psr2 = sink_support(&data, PSR_MODE_2);
-
- data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd, 4096);
- igt_assert(data.bufmgr);
- drm_intel_bufmgr_gem_enable_reuse(data.bufmgr);
-
+ data.bops = buf_ops_create(data.drm_fd);
display_init(&data);
}
@@ -528,7 +542,7 @@ igt_main_args("", long_options, help_str, opt_handler, &data)
psr_disable(data.drm_fd, data.debugfs_fd);
close(data.debugfs_fd);
- drm_intel_bufmgr_destroy(data.bufmgr);
+ buf_ops_destroy(data.bops);
display_fini(&data);
}
}
--
2.26.0
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