[igt-dev] [PATCH i-g-t v4 10/25] i915/gem_unfence_active_buffers.c: Remove librdm dependency
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Wed Sep 23 08:39:34 UTC 2020
On Tue, Sep 22, 2020 at 01:52:14PM +0200, Dominik Grzegorzek wrote:
> Use intel_bb / intel_buf to remove libdrm dependency.
>
> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> tests/i915/gem_unfence_active_buffers.c | 134 ++++++++++++------------
> 1 file changed, 69 insertions(+), 65 deletions(-)
>
> diff --git a/tests/i915/gem_unfence_active_buffers.c b/tests/i915/gem_unfence_active_buffers.c
> index 1e69c70d..fc30755f 100644
> --- a/tests/i915/gem_unfence_active_buffers.c
> +++ b/tests/i915/gem_unfence_active_buffers.c
> @@ -51,23 +51,22 @@
> #include "drm.h"
> #include "i915/gem.h"
> #include "igt.h"
> -#include "intel_bufmgr.h"
>
> IGT_TEST_DESCRIPTION("Check for use-after-free in the fence stealing code.");
>
> -static drm_intel_bufmgr *bufmgr;
> -struct intel_batchbuffer *batch;
> -uint32_t devid;
> -
> -#define TEST_SIZE (1024*1024)
> -#define TEST_STRIDE (4*1024)
> +#define WIDTH 1024
> +#define HEIGHT 1024
> +#define TEST_SIZE (WIDTH*HEIGHT)
> +#define TEST_STRIDE (4*WIDTH)
>
> uint32_t data[TEST_SIZE/4];
>
> igt_simple_main
> {
> int i, ret, fd, num_fences;
> - drm_intel_bo *busy_bo, *test_bo;
> + struct intel_bb *ibb;
> + struct buf_ops *bops;
> + struct intel_buf *busy_buf, *test_buf;
> uint32_t tiling = I915_TILING_X;
>
> for (i = 0; i < 1024*256; i++)
> @@ -77,86 +76,91 @@ igt_simple_main
> igt_require_gem(fd);
> gem_require_blitter(fd);
>
> - bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
> - drm_intel_bufmgr_gem_enable_reuse(bufmgr);
> - devid = intel_get_drm_devid(fd);
> - batch = intel_batchbuffer_alloc(bufmgr, devid);
> + bops = buf_ops_create(fd);
> + ibb = intel_bb_create(fd, 4 * 4096);
We likely want to relocate, so I would do:
ibb = intel_bb_create_with_relocs(fd, 4 * 4096);
We also don't want to serialize so:
intel_bb_set_fencing(ibb, false);
would help.
>
> igt_info("filling ring\n");
> - busy_bo = drm_intel_bo_alloc(bufmgr, "busy bo bo", 16*1024*1024, 4096);
> + busy_buf = intel_buf_create(bops, WIDTH, HEIGHT, 16, 4096, I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
WIDTH * HEIGHT * 2B (16bit) != 16 * 1024 * 1024
>
> for (i = 0; i < 250; i++) {
> - BLIT_COPY_BATCH_START(0);
> - OUT_BATCH((3 << 24) | /* 32 bits */
> + intel_bb_blit_start(ibb, 0);
> + intel_bb_out(ibb, (3 << 24) | /* 32 bits */
> (0xcc << 16) | /* copy ROP */
> 2*1024*4);
> - OUT_BATCH(0 << 16 | 1024);
> - OUT_BATCH((2048) << 16 | (2048));
> - OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
> - OUT_BATCH(0 << 16 | 0);
> - OUT_BATCH(2*1024*4);
> - OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
> - ADVANCE_BATCH();
> -
> - if (batch->gen >= 6) {
> - BEGIN_BATCH(3, 0);
> - OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
> - OUT_BATCH(0);
> - OUT_BATCH(0);
> - ADVANCE_BATCH();
> + intel_bb_out(ibb, 0 << 16 | 1024);
> + intel_bb_out(ibb, (2048) << 16 | (2048));
> + intel_bb_emit_reloc_fenced(ibb, busy_buf->handle,
> + I915_GEM_DOMAIN_RENDER,
> + I915_GEM_DOMAIN_RENDER, 0, 0x0);
Use busy_buf->addr.offset instead of 0 or INTEL_BUF_INVALID_ADDRESS to make
difference between offset and presumed_offset. Apply also for other relocs.
> + intel_bb_out(ibb, 0 << 16 | 0);
> + intel_bb_out(ibb, 2*1024*4);
> + intel_bb_emit_reloc_fenced(ibb, busy_buf->handle,
> + I915_GEM_DOMAIN_RENDER, 0, 0, 0x0);
> +
> + if (ibb->gen >= 6) {
> + intel_bb_out(ibb, XY_SETUP_CLIP_BLT_CMD);
> + intel_bb_out(ibb, 0);
> + intel_bb_out(ibb, 0);
> }
> }
> - intel_batchbuffer_flush(batch);
> + intel_bb_flush_blit(ibb);
>
> num_fences = gem_available_fences(fd);
> igt_info("creating havoc on %i fences\n", num_fences);
>
> for (i = 0; i < num_fences*2; i++) {
> - test_bo = drm_intel_bo_alloc(bufmgr, "test_bo",
> - TEST_SIZE, 4096);
> - ret = drm_intel_bo_set_tiling(test_bo, &tiling, TEST_STRIDE);
> + test_buf = intel_buf_create(bops, WIDTH, HEIGHT, 32, 4096,
> + tiling, I915_COMPRESSION_NONE);
> igt_assert(ret == 0);
>
> - drm_intel_bo_disable_reuse(test_bo);
> -
> - BLIT_COPY_BATCH_START(0);
> - OUT_BATCH((3 << 24) | /* 32 bits */
> + intel_bb_blit_start(ibb, 0);
> + intel_bb_out(ibb, (3 << 24) | /* 32 bits */
> (0xcc << 16) | /* copy ROP */
> TEST_STRIDE);
> - OUT_BATCH(0 << 16 | 0);
> - OUT_BATCH((1) << 16 | (1));
> - OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
> - OUT_BATCH(0 << 16 | 0);
> - OUT_BATCH(TEST_STRIDE);
> - OUT_RELOC_FENCED(test_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
> - ADVANCE_BATCH();
> - intel_batchbuffer_flush(batch);
> - igt_info("test bo offset: %#lx\n", test_bo->offset);
> -
> - drm_intel_bo_unreference(test_bo);
> + intel_bb_out(ibb, 0 << 16 | 0);
> + intel_bb_out(ibb, (1) << 16 | (1));
> + intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
> + I915_GEM_DOMAIN_RENDER,
> + I915_GEM_DOMAIN_RENDER, 0, 0x0);
> + intel_bb_out(ibb, 0 << 16 | 0);
> + intel_bb_out(ibb, TEST_STRIDE);
> + intel_bb_emit_reloc_fenced(ibb, test_buf->handle,
> + I915_GEM_DOMAIN_RENDER, 0, 0, 0x0);
> +
> + intel_bb_flush_blit(ibb);
> + igt_info("test bo offset: %#lx\n",
> + intel_bb_get_object_offset(ibb, test_buf->handle));
> +
> + intel_buf_destroy(test_buf);
> + intel_bb_reset(ibb, true);
> }
>
> /* launch a few batchs to ensure the damaged slab objects get reused. */
> for (i = 0; i < 10; i++) {
> - BLIT_COPY_BATCH_START(0);
> - OUT_BATCH((3 << 24) | /* 32 bits */
> + intel_bb_blit_start(ibb, 0);
> + intel_bb_out(ibb, (3 << 24) | /* 32 bits */
> (0xcc << 16) | /* copy ROP */
> 2*1024*4);
> - OUT_BATCH(0 << 16 | 1024);
> - OUT_BATCH((1) << 16 | (1));
> - OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
> - OUT_BATCH(0 << 16 | 0);
> - OUT_BATCH(2*1024*4);
> - OUT_RELOC_FENCED(busy_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
> - ADVANCE_BATCH();
> -
> - if (batch->gen >= 8) {
> - BEGIN_BATCH(3, 0);
> - OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
> - OUT_BATCH(0);
> - OUT_BATCH(0);
> - ADVANCE_BATCH();
> + intel_bb_out(ibb, 0 << 16 | 1024);
> + intel_bb_out(ibb, (1) << 16 | (1));
> + intel_bb_emit_reloc_fenced(ibb, busy_buf->handle,
> + I915_GEM_DOMAIN_RENDER,
> + I915_GEM_DOMAIN_RENDER, 0, 0x0);
> + intel_bb_out(ibb, 0 << 16 | 0);
> + intel_bb_out(ibb, 2*1024*4);
> + intel_bb_emit_reloc_fenced(ibb, busy_buf->handle,
> + I915_GEM_DOMAIN_RENDER, 0, 0, 0x0);
> +
> + if (ibb->gen >= 8) {
> + intel_bb_out(ibb, XY_SETUP_CLIP_BLT_CMD);
> + intel_bb_out(ibb, 0);
> + intel_bb_out(ibb, 0);
> }
> }
> - intel_batchbuffer_flush(batch);
> + intel_bb_flush_blit(ibb);
> +
> + intel_buf_destroy(busy_buf);
> + intel_bb_destroy(ibb);
> + buf_ops_destroy(bops);
> }
I have some doubts regarding offsets proposed from kernel with intel_bb
and with libdrm usage so I need to dig it more to explain the difference.
In case libdrm we got addresses in gtt which adhere. With intel_bb
I see for 1MB objects objects are aligned to 2MB.
--
Zbigniew
> --
> 2.20.1
>
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