[igt-dev] [PATCH i-g-t v4 23/25] tests/prime_nv_test.c: Remove libdrm dependency
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Mon Sep 28 07:49:58 UTC 2020
On Tue, Sep 22, 2020 at 01:52:27PM +0200, Dominik Grzegorzek wrote:
> Use intel_bb / intel_buf to remove libdrm dependency.
>
> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
> Cc: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> tests/prime_nv_test.c | 189 +++++++++++++++++++++++-------------------
> 1 file changed, 106 insertions(+), 83 deletions(-)
Generally same issues like previous review - alignment (0 instead 4096),
prime_handle_to_fd_for_mmap() and intel_buf size check is equal to BO_SIZE.
Prepare nv intel libdrm removal as separate series.
--
Zbigniew
>
> diff --git a/tests/prime_nv_test.c b/tests/prime_nv_test.c
> index b4714dcb..37aea69d 100644
> --- a/tests/prime_nv_test.c
> +++ b/tests/prime_nv_test.c
> @@ -23,17 +23,17 @@
> #include <sys/stat.h>
> #include <sys/ioctl.h>
>
> -#include "intel_bufmgr.h"
> #include "nouveau.h"
>
> int intel_fd = -1, nouveau_fd = -1;
> -drm_intel_bufmgr *bufmgr;
> +struct buf_ops *bops;
> struct nouveau_device *ndev;
> struct nouveau_client *nclient;
> -uint32_t devid;
> -struct intel_batchbuffer *intel_batch;
> +struct intel_bb *ibb;
>
> -#define BO_SIZE (256*1024)
> +#define WIDTH 256
> +#define HEIGHT 256
> +#define BO_SIZE (WIDTH*HEIGHT*4)
>
> static int find_and_open_devices(void)
> {
> @@ -83,20 +83,21 @@ static int find_and_open_devices(void)
> */
> static void test_i915_nv_sharing(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> int prime_fd;
> struct nouveau_bo *nvbo;
>
> - test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
> - igt_assert(test_intel_bo);
> + test_intel_buf = intel_buf_create(bops, WIDTH, HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
>
> - drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
> + prime_fd = prime_handle_to_fd(intel_fd, test_intel_buf->handle);
>
> igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
> close(prime_fd);
>
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /*
> @@ -109,7 +110,8 @@ static void test_i915_nv_sharing(void)
> */
> static void test_nv_i915_sharing(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> + uint32_t handle;
> int prime_fd;
> struct nouveau_bo *nvbo;
>
> @@ -117,12 +119,16 @@ static void test_nv_i915_sharing(void)
> 0, BO_SIZE, NULL, &nvbo) == 0);
> igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
>
> - test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
> + handle = prime_fd_to_handle(intel_fd, prime_fd);
> + test_intel_buf = intel_buf_create_using_handle(bops, handle, WIDTH,
> + HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
> + intel_buf_set_ownership(test_intel_buf, true);
> close(prime_fd);
> - igt_assert(test_intel_bo);
>
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /*
> @@ -131,14 +137,16 @@ static void test_nv_i915_sharing(void)
> */
> static void test_nv_write_i915_cpu_mmap_read(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> int prime_fd;
> struct nouveau_bo *nvbo = NULL;
> uint32_t *ptr;
>
> - test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
> + test_intel_buf = intel_buf_create(bops, WIDTH, HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
>
> - drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
> + prime_fd = prime_handle_to_fd(intel_fd, test_intel_buf->handle);
>
> igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
> close(prime_fd);
> @@ -147,13 +155,14 @@ static void test_nv_write_i915_cpu_mmap_read(void)
> ptr = nvbo->map;
> *ptr = 0xdeadbeef;
>
> - drm_intel_bo_map(test_intel_bo, 1);
> - ptr = test_intel_bo->virtual;
> + intel_buf_cpu_map(test_intel_buf, true);
> + ptr = test_intel_buf->ptr;
> igt_assert(ptr);
>
> igt_assert(*ptr == 0xdeadbeef);
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + intel_buf_unmap(test_intel_buf);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /*
> @@ -162,14 +171,16 @@ static void test_nv_write_i915_cpu_mmap_read(void)
> */
> static void test_nv_write_i915_gtt_mmap_read(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> int prime_fd;
> struct nouveau_bo *nvbo = NULL;
> uint32_t *ptr;
>
> - test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
> + test_intel_buf = intel_buf_create(bops, WIDTH, HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
>
> - drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
> + prime_fd = prime_handle_to_fd(intel_fd, test_intel_buf->handle);
>
> igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
> close(prime_fd);
> @@ -177,14 +188,16 @@ static void test_nv_write_i915_gtt_mmap_read(void)
> ptr = nvbo->map;
> *ptr = 0xdeadbeef;
>
> - drm_intel_gem_bo_map_gtt(test_intel_bo);
> - ptr = test_intel_bo->virtual;
> + ptr = gem_mmap__gtt(intel_fd, test_intel_buf->handle,
> + test_intel_buf->surface[0].size, PROT_READ);
> +
> igt_assert(ptr);
>
> igt_assert(*ptr == 0xdeadbeef);
>
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + gem_munmap(ptr, test_intel_buf->surface[0].size);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /* test drm_intel_bo_map doesn't work properly,
> @@ -192,32 +205,37 @@ static void test_nv_write_i915_gtt_mmap_read(void)
> for these objects */
> static void test_i915_import_cpu_mmap(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> int prime_fd;
> struct nouveau_bo *nvbo;
> - uint32_t *ptr;
> + uint32_t *ptr, handle;
>
> igt_skip("cpu mmap support for imported dma-bufs not yet implemented\n");
>
> igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
> 0, BO_SIZE, NULL, &nvbo) == 0);
> igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
> - test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
> +
> + handle = prime_fd_to_handle(intel_fd, prime_fd);
> + test_intel_buf = intel_buf_create_using_handle(bops, handle, WIDTH,
> + HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
> + intel_buf_set_ownership(test_intel_buf, true);
> close(prime_fd);
> - igt_assert(test_intel_bo);
>
> igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
>
> ptr = nvbo->map;
> *ptr = 0xdeadbeef;
>
> - igt_assert(drm_intel_bo_map(test_intel_bo, 0) == 0);
> - igt_assert(test_intel_bo->virtual);
> - ptr = test_intel_bo->virtual;
> + intel_buf_cpu_map(test_intel_buf, false);
> + ptr = test_intel_buf->ptr;
>
> igt_assert(*ptr == 0xdeadbeef);
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + intel_buf_unmap(test_intel_buf);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /* test drm_intel_bo_map_gtt works properly,
> @@ -225,18 +243,22 @@ static void test_i915_import_cpu_mmap(void)
> for these objects */
> static void test_i915_import_gtt_mmap(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> int prime_fd;
> struct nouveau_bo *nvbo;
> - uint32_t *ptr;
> + uint32_t *ptr, handle;
>
> igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
> 0, BO_SIZE, NULL, &nvbo) == 0);
> igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
>
> - test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
> + handle = prime_fd_to_handle(intel_fd, prime_fd);
> + test_intel_buf = intel_buf_create_using_handle(bops, handle, WIDTH,
> + HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
> + intel_buf_set_ownership(test_intel_buf, true);
> close(prime_fd);
> - igt_assert(test_intel_bo);
>
> igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
>
> @@ -244,107 +266,112 @@ static void test_i915_import_gtt_mmap(void)
> *ptr = 0xdeadbeef;
> *(ptr + 1) = 0xa55a55;
>
> - igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0);
> - igt_assert(test_intel_bo->virtual);
> - ptr = test_intel_bo->virtual;
> + ptr = gem_mmap__gtt(intel_fd, test_intel_buf->handle,
> + test_intel_buf->surface[0].size, PROT_READ);
>
> igt_assert(*ptr == 0xdeadbeef);
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + gem_munmap(ptr, test_intel_buf->surface[0].size);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /* test 7 - import from nouveau into intel, test pread/pwrite fail */
> static void test_i915_import_pread_pwrite(void)
> {
> - drm_intel_bo *test_intel_bo;
> + struct intel_buf *test_intel_buf;
> int prime_fd;
> struct nouveau_bo *nvbo;
> - uint32_t *ptr;
> + uint32_t *ptr, handle;
> uint32_t buf[64];
>
> igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
> 0, BO_SIZE, NULL, &nvbo) == 0);
> igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
>
> - test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
> + handle = prime_fd_to_handle(intel_fd, prime_fd);
> + test_intel_buf = intel_buf_create_using_handle(bops, handle, WIDTH,
> + HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
> + intel_buf_set_ownership(test_intel_buf, true);
> close(prime_fd);
> - igt_assert(test_intel_bo);
>
> igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
>
> ptr = nvbo->map;
> *ptr = 0xdeadbeef;
>
> - gem_read(intel_fd, test_intel_bo->handle, 0, buf, 256);
> + gem_read(intel_fd, test_intel_buf->handle, 0, buf, 256);
> igt_assert(buf[0] == 0xdeadbeef);
> buf[0] = 0xabcdef55;
>
> - gem_write(intel_fd, test_intel_bo->handle, 0, buf, 4);
> + gem_write(intel_fd, test_intel_buf->handle, 0, buf, 4);
>
> igt_assert(*ptr == 0xabcdef55);
>
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + intel_buf_destroy(test_intel_buf);
> }
>
> static void
> -set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
> +set_bo(struct intel_buf *buf, uint32_t val, int width, int height)
> {
> - int size = width * height;
> - uint32_t *vaddr;
> + int size = width * height;
> + uint32_t *vaddr;
> +
> + vaddr = gem_mmap__gtt(intel_fd, buf->handle, buf->surface[0].size,
> + PROT_WRITE);
> + while (size--)
> + *vaddr++ = val;
>
> - drm_intel_gem_bo_start_gtt_access(bo, true);
> - vaddr = bo->virtual;
> - while (size--)
> - *vaddr++ = val;
> + gem_munmap(vaddr, buf->surface[0].size);
> }
>
> -static drm_intel_bo *
> -create_bo(drm_intel_bufmgr *ibufmgr, uint32_t val, int width, int height)
> +static struct intel_buf *
> +create_bo(struct buf_ops *ibops, uint32_t val, int width, int height)
> {
> - drm_intel_bo *bo;
> -
> - bo = drm_intel_bo_alloc(ibufmgr, "bo", 4*width*height, 0);
> - igt_assert(bo);
> + struct intel_buf *buf;
>
> - /* gtt map doesn't have a write parameter, so just keep the mapping
> - * around (to avoid the set_domain with the gtt write domain set) and
> - * manually tell the kernel when we start access the gtt. */
> - drm_intel_gem_bo_map_gtt(bo);
> + buf = intel_buf_create(ibops, width, height, 32, 0, I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
>
> - set_bo(bo, val, width, height);
> + set_bo(buf, val, width, height);
>
> - return bo;
> + return buf;
> }
>
> /* use intel hw to fill the BO with a blit from another BO,
> then readback from the nouveau bo, check value is correct */
> static void test_i915_blt_fill_nv_read(void)
> {
> - drm_intel_bo *test_intel_bo, *src_bo;
> + struct intel_buf *test_intel_buf, *src_buf;
> int prime_fd;
> struct nouveau_bo *nvbo = NULL;
> uint32_t *ptr;
>
> - src_bo = create_bo(bufmgr, 0xaa55aa55, 256, 1);
> + src_buf = create_bo(bops, 0xaa55aa55, 256, 1);
>
> - test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
> + test_intel_buf = intel_buf_create(bops, WIDTH, HEIGHT, 32, 4096,
> + I915_TILING_NONE,
> + I915_COMPRESSION_NONE);
>
> - drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
> + prime_fd = prime_handle_to_fd(intel_fd, test_intel_buf->handle);
>
> igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
> close(prime_fd);
>
> - intel_copy_bo(intel_batch, test_intel_bo, src_bo, BO_SIZE);
> + intel_bb_copy_intel_buf(ibb, test_intel_buf, src_buf,
> + src_buf->surface[0].size);
>
> igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
>
> - drm_intel_bo_map(test_intel_bo, 0);
> + intel_buf_cpu_map(test_intel_buf, 0);
>
> ptr = nvbo->map;
> igt_assert(*ptr == 0xaa55aa55);
> nouveau_bo_ref(NULL, &nvbo);
> - drm_intel_bo_unreference(test_intel_bo);
> + intel_buf_unmap(test_intel_buf);
> + intel_buf_destroy(test_intel_buf);
> }
>
> /* test 8 use nouveau to do blit */
> @@ -360,18 +387,14 @@ igt_main
> igt_require(intel_fd != -1);
>
> /* set up intel bufmgr */
> - bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
> - igt_assert(bufmgr);
> - /* Do not enable reuse, we share (almost) all buffers. */
> - //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
> + bops = buf_ops_create(intel_fd);
>
> /* set up nouveau bufmgr */
> igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) == 0);
> igt_assert(nouveau_client_new(ndev, &nclient) == 0);
>
> /* set up an intel batch buffer */
> - devid = intel_get_drm_devid(intel_fd);
> - intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
> + ibb = intel_bb_create(intel_fd, 4096);
> }
>
> #define xtest(name) \
> @@ -388,10 +411,10 @@ igt_main
> xtest(i915_blt_fill_nv_read);
>
> igt_fixture {
> - intel_batchbuffer_free(intel_batch);
> + intel_bb_destroy(ibb);
>
> nouveau_device_del(&ndev);
> - drm_intel_bufmgr_destroy(bufmgr);
> + buf_ops_destroy(bops);
>
> close(intel_fd);
> close(nouveau_fd);
> --
> 2.20.1
>
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