[igt-dev] [PATCH i-g-t v5 45/65] tests/i915_pm_rc6_residency: Adopt to use allocator
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Mon Aug 9 13:05:13 UTC 2021
For newer gens we're not able to rely on relocations. Adopt to use
offsets acquired from the allocator.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
Cc: Petri Latvala <petri.latvala at intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit at intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
---
tests/i915/i915_pm_rc6_residency.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/tests/i915/i915_pm_rc6_residency.c b/tests/i915/i915_pm_rc6_residency.c
index d1cce474e..96a951406 100644
--- a/tests/i915/i915_pm_rc6_residency.c
+++ b/tests/i915/i915_pm_rc6_residency.c
@@ -458,7 +458,7 @@ static void rc6_fence(int i915)
const intel_ctx_t *ctx;
struct power_sample sample[2];
unsigned long slept;
- uint64_t rc6, ts[2];
+ uint64_t rc6, ts[2], ahnd;
struct rapl rapl;
int fd;
@@ -486,6 +486,7 @@ static void rc6_fence(int i915)
/* Submit but delay execution, we should be idle and conserving power */
ctx = intel_ctx_create_all_physical(i915);
+ ahnd = get_reloc_ahnd(i915, ctx->id);
for_each_ctx_engine(i915, ctx, e) {
igt_spin_t *spin;
int timeline;
@@ -493,7 +494,9 @@ static void rc6_fence(int i915)
timeline = sw_sync_timeline_create();
fence = sw_sync_timeline_create_fence(timeline, 1);
- spin = igt_spin_new(i915, .ctx = ctx,
+ spin = igt_spin_new(i915,
+ .ahnd = ahnd,
+ .ctx = ctx,
.engine = e->flags,
.fence = fence,
.flags = IGT_SPIN_FENCE_IN);
@@ -522,6 +525,7 @@ static void rc6_fence(int i915)
gem_quiescent_gpu(i915);
}
intel_ctx_destroy(i915, ctx);
+ put_ahnd(ahnd);
rapl_close(&rapl);
close(fd);
--
2.26.0
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