[igt-dev] [PATCH i-g-t 35/79] tests/i915/gem_shrink: Convert to intel_ctx_t (v4)

[Jason Ekstrand]

Only one subtest actually needs to iterate over engines.

v2 (Zbigniew Kempczyński):
 - Rework the execbufX loop to be more robust

v3 (Ashutosh Dixit):
 - Don't explicitly create VMs if we don't have full PPGTT

v4 (Ashutosh Dixit):
 - Fix a j -> i typo

Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
---
 tests/i915/gem_exec_schedule.c | 10 +++++++---
 tests/i915/gem_shrink.c        | 18 +++++++++---------
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 1763695cd..3a51b51da 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1201,7 +1201,8 @@ noreorder(int i915, const intel_ctx_cfg_t *cfg,
 	if (flags & CORKED)
 		fence = igt_cork_plug(&cork, i915);
 
-	vm_cfg.vm = gem_vm_create(i915);
+	if (gem_uses_full_ppgtt(i915))
+		vm_cfg.vm = gem_vm_create(i915);
 
 	ctx = intel_ctx_create(i915, &vm_cfg);
 
@@ -1291,6 +1292,9 @@ noreorder(int i915, const intel_ctx_cfg_t *cfg,
 	igt_spin_free(i915, slice);
 	intel_ctx_destroy(i915, ctx);
 
+	if (vm_cfg.vm)
+		gem_vm_destroy(i915, vm_cfg.vm);
+
 	/* Check the store did not run before the spinner */
 	igt_assert_eq(sync_fence_status(spin->out_fence), 0);
 	igt_spin_free(i915, spin);
@@ -2528,7 +2532,7 @@ static void test_pi_iova(int i915, const intel_ctx_cfg_t *cfg,
 	igt_require_f(ioctl(ufd, UFFDIO_API, &api) == 0 && api.api == UFFD_API,
 		      "userfaultfd API v%lld:%lld\n", UFFD_API, api.api);
 
-	if (flags & SHARED)
+	if ((flags & SHARED) && gem_uses_full_ppgtt(i915))
 		ufd_cfg.vm = gem_vm_create(i915);
 
 	t.i915 = i915;
@@ -2613,7 +2617,7 @@ static void test_pi_iova(int i915, const intel_ctx_cfg_t *cfg,
 
 	munmap(t.page, 4096);
 
-	if (flags & SHARED)
+	if (ufd_cfg.vm)
 		gem_vm_destroy(i915, ufd_cfg.vm);
 
 	close(ufd);
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index b6450a6fb..ae61d0759 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -38,8 +38,6 @@
 #define MADV_FREE 8
 #endif
 
-static unsigned int engines[I915_EXEC_RING_MASK + 1], nengine;
-
 static void get_pages(int fd, uint64_t alloc)
 {
 	uint32_t handle = gem_create(fd, alloc);
@@ -164,8 +162,10 @@ static void execbufN(int fd, uint64_t alloc)
 static void execbufX(int fd, uint64_t alloc)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct intel_engine_data engines;
 	struct drm_i915_gem_exec_object2 *obj;
 	struct drm_i915_gem_execbuffer2 execbuf;
+	const intel_ctx_t *ctx;
 	int count = alloc >> 20;
 	uint64_t obj_size;
 
@@ -175,6 +175,9 @@ static void execbufX(int fd, uint64_t alloc)
 	obj[count].handle = gem_create(fd, 4096);
 	gem_write(fd, obj[count].handle, 0, &bbe, sizeof(bbe));
 
+	ctx = intel_ctx_create_all_physical(fd);
+	engines = intel_engine_list_for_ctx_cfg(fd, &ctx->cfg);
+
 	for (int i = 1; i <= count; i++) {
 		int j = count - i;
 
@@ -185,13 +188,16 @@ static void execbufX(int fd, uint64_t alloc)
 
 		execbuf.buffers_ptr = to_user_pointer(&obj[j]);
 		execbuf.buffer_count = i + 1;
-		execbuf.flags = engines[j % nengine];
+		execbuf.flags = engines.engines[j % engines.nengines].flags;
+		execbuf.rsvd1 = ctx->id;
 		gem_execbuf(fd, &execbuf);
 	}
 
 	for (int i = 0; i <= count; i++)
 		gem_madvise(fd, obj[i].handle, I915_MADV_DONTNEED);
 	munmap(obj, obj_size);
+
+	intel_ctx_destroy(fd, ctx);
 }
 
 static void hang(int fd, uint64_t alloc)
@@ -429,7 +435,6 @@ igt_main
 	igt_fixture {
 		const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 		uint64_t mem_size = intel_get_total_ram_mb();
-		const struct intel_execution_engine2 *e;
 		int fd;
 
 		fd = drm_open_driver(DRIVER_INTEL);
@@ -451,11 +456,6 @@ igt_main
 		intel_require_memory(num_processes, alloc_size,
 				     CHECK_SWAP | CHECK_RAM);
 
-		nengine = 0;
-		__for_each_physical_engine(fd, e)
-			engines[nengine++] = e->flags;
-		igt_require(nengine);
-
 		close(fd);
 	}
 
-- 
2.31.1