[igt-dev] [PATCH i-g-t] tests/kms_psr2_sf: Enable selective fetch feature in kernel

[Mun, Gwan-gyeong]

On Mon, 2021-02-22 at 09:09 -0800, José Roberto de Souza wrote:
> Enable PSR2 selective fetch using debugfs during test setup, this will
> allow us to have some test coverage of this feature by CI.
> 
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> Cc: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya at intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> ---
>  lib/igt_psr.c       |  3 +++
>  lib/igt_psr.h       |  3 ++-
>  tests/kms_psr2_sf.c | 10 ++++++----
>  3 files changed, 11 insertions(+), 5 deletions(-)
> 
> diff --git a/lib/igt_psr.c b/lib/igt_psr.c
> index d5167fbad..68240f9a3 100644
> --- a/lib/igt_psr.c
> +++ b/lib/igt_psr.c
> @@ -158,6 +158,9 @@ static bool psr_set(int device, int debugfs_fd, int
> mode)
>                 case PSR_MODE_2:
>                         debug_val = "0x2";
>                         break;
> +               case PSR_MODE_2_SEL_FETCH:
> +                       debug_val = "0x4";
> +                       break;
>                 default:
>                         /* Disables PSR */
>                         debug_val = "0x1";
> diff --git a/lib/igt_psr.h b/lib/igt_psr.h
> index 25111cc2b..c47b197b1 100644
> --- a/lib/igt_psr.h
> +++ b/lib/igt_psr.h
> @@ -32,7 +32,8 @@
>  
>  enum psr_mode {
>         PSR_MODE_1,
> -       PSR_MODE_2
> +       PSR_MODE_2,
> +       PSR_MODE_2_SEL_FETCH,
>  };
>  
>  bool psr_disabled_check(int debugfs_fd);
> diff --git a/tests/kms_psr2_sf.c b/tests/kms_psr2_sf.c
> index 296ed8476..8d3e13019 100644
> --- a/tests/kms_psr2_sf.c
> +++ b/tests/kms_psr2_sf.c
> @@ -560,9 +560,6 @@ igt_main
>                                                data.debugfs_fd,
> PSR_MODE_2),
>                               "Sink does not support PSR2\n");
>  
> -
>                igt_require_f(psr2_selective_fetch_check(data.debugfs_fd)
> ,
> -                             "PSR2 selective fetch not enabled\n");
> -
>                 data.bufmgr = drm_intel_bufmgr_gem_init(data.drm_fd,
> 4096);
>                 igt_assert(data.bufmgr);
>                 drm_intel_bufmgr_gem_enable_reuse(data.bufmgr);
> @@ -571,7 +568,7 @@ igt_main
>  
>                 /* Test if PSR2 can be enabled */
>                 igt_require_f(psr_enable(data.drm_fd,
> -                                        data.debugfs_fd, PSR_MODE_2),
> +                                        data.debugfs_fd,
> PSR_MODE_2_SEL_FETCH),
>                               "Error enabling PSR2\n");
>  
>                 data.damage_area_count = MAX_DAMAGE_AREAS;
> @@ -579,6 +576,11 @@ igt_main
>                 data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
>                 prepare(&data);
>                 r = psr_wait_entry(data.debugfs_fd, PSR_MODE_2);
> +               if (!r)
> +                       psr_print_debugfs(data.debugfs_fd);
> +
> +               igt_require_f(psr2_selective_fetch_check(data.debugfs_f
> d),
> +                             "PSR2 selective fetch not enabled\n");
>                 cleanup(&data);
>                 if (!r)
>                         psr_print_debugfs(data.debugfs_fd);

Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>