[igt-dev] [PATCH i-g-t] tests/i915/kms_big_fb: First async flip discarded on i915
Karthik B S
karthik.b.s at intel.com
Mon Aug 1 09:35:21 UTC 2022
Display 13 onwards, i915 uses the first async flip to update the
watermarks as per the watermark optimization. Hence the actual
async flip will happen from the subsequent flips.
To handle this, a dummy async flip has to be done in the async flip
subtests to allow the KMD to perform the watermark related updates
before writing to the surface base address.
Signed-off-by: Karthik B S <karthik.b.s at intel.com>
---
tests/i915/kms_big_fb.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/tests/i915/kms_big_fb.c b/tests/i915/kms_big_fb.c
index d50fde45..c2ee422b 100644
--- a/tests/i915/kms_big_fb.c
+++ b/tests/i915/kms_big_fb.c
@@ -470,6 +470,7 @@ max_hw_stride_async_flip_test(data_t *data)
h = data->output->config.default_mode.vdisplay;
igt_plane_t *primary;
igt_crc_t compare_crc, async_crc;
+ uint32_t devid = intel_get_drm_devid(data->drm_fd);
igt_require(data->display.is_atomic);
igt_output_set_pipe(data->output, data->pipe);
@@ -518,6 +519,16 @@ max_hw_stride_async_flip_test(data_t *data)
igt_display_commit_atomic(&data->display,
DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+ /* First async flip on Gen13+ will be treated as a sync flip*/
+ if (AT_LEAST_GEN(devid, 12)) {
+ do {
+ ret = drmModePageFlip(data->drm_fd, data->output->config.crtc->crtc_id,
+ data->big_fb.fb_id,
+ DRM_MODE_PAGE_FLIP_ASYNC, NULL);
+ } while (ret == -EBUSY);
+ igt_assert(ret == 0);
+ }
+
igt_wait_for_vblank(data->drm_fd, data->display.pipes[primary->pipe->pipe].crtc_offset);
startframe = kmstest_get_vblank(data->drm_fd, data->pipe, 0) + 1;
--
2.22.0
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