[igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

Matt Roper matthew.d.roper at intel.com
Tue Jan 18 22:32:43 UTC 2022


On Mon, Jan 17, 2022 at 12:20:42PM -0800, Dixit, Ashutosh wrote:
> On Mon, 17 Jan 2022 00:56:59 -0800, <priyanka.dandamudi at intel.com> wrote:
> >
> > +bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> > +{
> > +	const struct intel_execution_engine2 *e;
> > +	bool rcs0 = false;
> > +	bool ccs0 = false;
> > +	int ccs_count = 0;
> > +
> > +	for_each_ctx_engine(fd, ctx, e) {
> > +		if ((rcs0 && ccs0) || (ccs_count > 1))
> > +			break;
> > +		else if (e->class == I915_ENGINE_CLASS_RENDER)
> > +			rcs0 = true;
> > +		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
> > +			ccs0 = true;
> > +			ccs_count++;
> > +		}
> > +	}
> > +	return ((rcs0 && ccs0) || (ccs_count > 1));
> > +}
> 
> No need for bool, just use counts. Something like:
> 
> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> {
> 	const struct intel_execution_engine2 *e;
> 	int rcs = 0, ccs = 0;
> 
> 	for_each_ctx_engine(fd, ctx, e) {
> 		if (e->class == I915_ENGINE_CLASS_RENDER)
> 			rcs++;
> 		else if (e->class == I915_ENGINE_CLASS_COMPUTE)
> 			ccs++;
> 	}
> 
> 	return ((rcs && ccs) || (ccs >= 2));
> }
> 
> Hmm, this can just be:
> 
> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> {
> 	const struct intel_execution_engine2 *e;
> 	int count = 0;
> 
> 	for_each_ctx_engine(fd, ctx, e)
> 		if (e->class == I915_ENGINE_CLASS_RENDER ||
> 			e->class == I915_ENGINE_CLASS_COMPUTE)
> 		count++;
> 
> 	return count >= 2;
> }

Yeah, there's no reason to count RCS and CCS separately; all we care
about is whether there's more than one engine in the shared reset
domain.

However I think any approach that involves just counting engines from
userspace isn't really going to work once we start supporting multi-tile
since the various RCS/CCS engines on two separate GTs do belong to
separate reset domains.  E.g., if you query the engine list and see just
CCS0 and CCS1 (or even RCS0 and CCS0) you don't know whether those
engines are both from a single GT and thus share a reset domain, or
whether they come from different GTs and each has its own reset domain.


Matt

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795


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