[igt-dev] [PATCH i-g-t v2] tests/kms_invalid_mode: Skip clock-too-high subtest on DSC panel

[Navare, Manasi]

On Tue, May 17, 2022 at 10:48:26AM +0300, Ville Syrjälä wrote:
> On Mon, May 16, 2022 at 09:22:55AM +0530, Karthik B S wrote:
> > Max clock limit calculation isn't valid with DSC.
> 
> What does it have to do with DSC?

The problem with DSC is that, with DSC we can support much higher mode
clock withc ompressed BPP.
So even if the test sets high mode clock, driver is able to handle it
with compressed BPP and hence the modeset actually succeeds and test
fails.

Manasi

> 
> > Skip the test on DSC panels.
> > 
> > Fixes: https://gitlab.freedesktop.org/drm/intel/-/issues/4402
> > 
> > Signed-off-by: Karthik B S <karthik.b.s at intel.com>
> > ---
> >  tests/kms_invalid_mode.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/tests/kms_invalid_mode.c b/tests/kms_invalid_mode.c
> > index bb92a94e..cf011a17 100644
> > --- a/tests/kms_invalid_mode.c
> > +++ b/tests/kms_invalid_mode.c
> > @@ -73,6 +73,8 @@ adjust_mode_clock_too_high(data_t *data, drmModeModeInfoPtr mode)
> >  	int max_dotclock = data->max_dotclock;
> >  
> >  	igt_require(max_dotclock != 0);
> > +	igt_require(!igt_is_dsc_supported(data->drm_fd,
> > +					  data->output->config.connector));
> >  
> >  	/*
> >  	 * FIXME When we have a fixed mode, the kernel will ignore
> > -- 
> > 2.22.0
> 
> -- 
> Ville Syrjälä
> Intel