[igt-dev] [PATCH i-g-t] i915/i915_pm_rps: Actual freq can be 0 when idle or in RC6

[Nilawar, Badal]

On 27-09-2022 11:58, Ashutosh Dixit wrote:
> From: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
> 
> Actual freq read from sysfs can be 0, i.e. less than RPn, in certain
> situations. For example when the device is idle (without the runtime PM
> wakeref) actual freq read from sysfs will be 0. Also on Gen12+ actual freq
> read from HW will be 0 in RC6. Therefore modify checks comparing actual
> freq with RPn.
> 
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
> Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar at intel.com>
> ---
>   tests/i915/i915_pm_rps.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/tests/i915/i915_pm_rps.c b/tests/i915/i915_pm_rps.c
> index db39ec69865c..4865ed1f0042 100644
> --- a/tests/i915/i915_pm_rps.c
> +++ b/tests/i915/i915_pm_rps.c
> @@ -483,14 +483,15 @@ static void idle_check(void)
>   		read_freqs(freqs);
>   		dump(freqs);
>   		check_freq_constraints(freqs);
> -		if (freqs[ACT] == freqs[RPn])
> +		if (freqs[ACT] <= freqs[RPn])
>   			break;
>   		usleep(1000 * IDLE_WAIT_TIMESTEP_MSEC);
>   		wait += IDLE_WAIT_TIMESTEP_MSEC;
>   	} while (wait < IDLE_WAIT_TIMEOUT_MSEC);
>   
>   	igt_debugfs_dump(drm_fd, "i915_rps_boost_info");
> -	igt_assert_eq(freqs[ACT], freqs[RPn]);
> +	/* Actual freq may be 0 when idle or in RC6 */
> +	igt_assert_lte(freqs[ACT], freqs[RPn]);
>   	igt_debug("Required %d msec to reach cur=idle\n", wait);
>   }
>