[igt-dev] [PATCH i-g-t] tests/i915/gem_userptr_blits: Added XY_FAST_COPY_BLT Command for MTL

[Kamil Konieczny]

Hi,

On 2022-11-21 at 16:24:36 +0530, Vikas Srivastava wrote:
> From: Arjun Melkaveri <arjun.melkaveri at intel.com>
> 
> Test case uses legacy command which is not supported on MTL.
> Modified test to use XY_FAST_COPY_BLT.
> 
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri at intel.com>
> Acked-by: Priyanka Dandamudi <priyanka.dandamudi at intel.com>
> ---
>  tests/i915/gem_userptr_blits.c | 128 +++++++++++++++++++++------------
>  1 file changed, 83 insertions(+), 45 deletions(-)
> 
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index 698508669..22cbd5e02 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -99,6 +99,7 @@ static int copy(int fd, uint32_t dst, uint32_t src)
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_exec_object2 obj[3];
>  	struct drm_i915_gem_execbuffer2 exec;
> +	static uint32_t devid;
>  	uint32_t handle;
>  	int ret, i=0;
>  	uint64_t dst_offset, src_offset, bb_offset;
> @@ -108,29 +109,47 @@ static int copy(int fd, uint32_t dst, uint32_t src)
>  	dst_offset = bb_offset + 4096;
>  	src_offset = dst_offset + WIDTH * HEIGHT * sizeof(uint32_t) * (src != dst);
>  
> -	batch[i++] = XY_SRC_COPY_BLT_CMD |
> -		  XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		  XY_SRC_COPY_BLT_WRITE_RGB;
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i - 1] |= 8;
> -	else
> -		batch[i - 1] |= 6;
> -
> -	batch[i++] = (3 << 24) | /* 32 bits */
> -		  (0xcc << 16) | /* copy ROP */
> -		  WIDTH*4;
> -	batch[i++] = 0; /* dst x1,y1 */
> -	batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> -	batch[i++] = dst_offset; /* dst reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = dst_offset >> 32;
> -	batch[i++] = 0; /* src x1,y1 */
> -	batch[i++] = WIDTH*4;
> -	batch[i++] = src_offset; /* src reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = src_offset >> 32;
> -	batch[i++] = MI_BATCH_BUFFER_END;
> -	batch[i++] = MI_NOOP;
> +	devid = intel_get_drm_devid(fd);
> +
> +	if (IS_PONTEVECCHIO(devid)) {
----------- ^
imho here check for >= gen12

> +		batch[i++] = XY_FAST_COPY_BLT;
> +		batch[i++] = XY_FAST_COPY_COLOR_DEPTH_32 | WIDTH*4;
> +		batch[i++] = 0;/* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH;/* dst x2,y2 */
> +		batch[i++] = 0;/* dst address lower bits */
---------------------------- ^
> +		batch[i++] = 0;/* dst address upper bits */
---------------------------- ^
Use dst_offset

> +		batch[i++] = 0;/* src x1,y1 */
> +		batch[i++] = WIDTH*4;/* src pitch */
> +		batch[i++] = 0;// src address lower bits
---------------------------- ^
> +		batch[i++] = 0;// src address upper bits
---------------------------- ^
Use src_offset

> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	} else {
> +		batch[i++] = XY_SRC_COPY_BLT_CMD |
> +			     XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			     XY_SRC_COPY_BLT_WRITE_RGB;
> +
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i - 1] |= 8;
> +		else
> +			batch[i - 1] |= 6;
> +
> +		batch[i++] = (3 << 24) | /* 32 bits */
> +			  (0xcc << 16) | /* copy ROP */
> +			  WIDTH*4;
> +		batch[i++] = 0; /* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> +		batch[i++] = dst_offset; /* dst reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = dst_offset >> 32;
> +		batch[i++] = 0; /* src x1,y1 */
> +		batch[i++] = WIDTH*4;
> +		batch[i++] = src_offset; /* src reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = src_offset >> 32;
> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	}
>  
>  	handle = gem_create(fd, 4096);
>  	gem_write(fd, handle, 0, batch, sizeof(batch));
> @@ -204,31 +223,50 @@ blit(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo)
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_exec_object2 *obj;
>  	struct drm_i915_gem_execbuffer2 exec;
> +	static uint32_t devid;
> +
>  	uint32_t handle;
>  	int n, ret, i=0;
>  
> -	batch[i++] = XY_SRC_COPY_BLT_CMD |
> -		  XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		  XY_SRC_COPY_BLT_WRITE_RGB;
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i - 1] |= 8;
> -	else
> -		batch[i - 1] |= 6;
> -	batch[i++] = (3 << 24) | /* 32 bits */
> -		  (0xcc << 16) | /* copy ROP */
> -		  WIDTH*4;
> -	batch[i++] = 0; /* dst x1,y1 */
> -	batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> -	batch[i++] = 0; /* dst reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = 0;
> -	batch[i++] = 0; /* src x1,y1 */
> -	batch[i++] = WIDTH*4;
> -	batch[i++] = 0; /* src reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = 0;
> -	batch[i++] = MI_BATCH_BUFFER_END;
> -	batch[i++] = MI_NOOP;
> +	devid = intel_get_drm_devid(fd);
> +
> +	if (IS_PONTEVECCHIO(devid)) {

Same here.

> +		batch[i++] = XY_FAST_COPY_BLT;
> +		batch[i++] = XY_FAST_COPY_COLOR_DEPTH_32 | WIDTH*4;
> +		batch[i++] = 0;/* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH;/* dst x2,y2 */
> +		batch[i++] = 0;/* dst address lower bits */
> +		batch[i++] = 0;/* dst address upper bits */

Same here.

> +		batch[i++] = 0;/* src x1,y1 */
> +		batch[i++] = WIDTH*4;/* src pitch */
> +		batch[i++] = 0;// src address lower bits
> +		batch[i++] = 0;// src address upper bits

Same here.

Regards,
Kamil

> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	} else {
> +		batch[i++] = XY_SRC_COPY_BLT_CMD |
> +			     XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			     XY_SRC_COPY_BLT_WRITE_RGB;
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i - 1] |= 8;
> +		else
> +			batch[i - 1] |= 6;
> +		batch[i++] = (3 << 24) | /* 32 bits */
> +			     (0xcc << 16) | /* copy ROP */
> +			     WIDTH*4;
> +		batch[i++] = 0; /* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> +		batch[i++] = 0; /* dst reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = 0;
> +		batch[i++] = 0; /* src x1,y1 */
> +		batch[i++] = WIDTH*4;
> +		batch[i++] = 0; /* src reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = 0;
> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	}
>  
>  	handle = gem_create(fd, 4096);
>  	gem_write(fd, handle, 0, batch, sizeof(batch));
> -- 
> 2.25.1
>