[igt-dev] [PATCH i-g-t v4] tests/i915/gem_userptr_blits: Added XY_FAST_COPY_BLT Command for MTL

[Kamil Konieczny]

Hi Vikas,

On 2022-11-22 at 12:20:35 +0530, Vikas Srivastava wrote:
> From: Arjun Melkaveri <arjun.melkaveri at intel.com>
> 
> Test case uses legacy command which is not supported on MTL.
> Modified test to use XY_FAST_COPY_BLT.
> 
> Signed-off-by: Arjun Melkaveri <arjun.melkaveri at intel.com>
> Acked-by: Priyanka Dandamudi <priyanka.dandamudi at intel.com>
> ---
>  tests/i915/gem_userptr_blits.c | 131 +++++++++++++++++++++------------
>  1 file changed, 84 insertions(+), 47 deletions(-)
> 
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index 698508669..2b566982c 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -99,8 +99,9 @@ static int copy(int fd, uint32_t dst, uint32_t src)
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_exec_object2 obj[3];
>  	struct drm_i915_gem_execbuffer2 exec;
> +	static uint32_t devid;
------- ^
Do not use static here.

>  	uint32_t handle;
> -	int ret, i=0;
> +	int ret, i = 0;
>  	uint64_t dst_offset, src_offset, bb_offset;
>  	bool has_relocs = gem_has_relocations(fd);
>  
> @@ -108,29 +109,44 @@ static int copy(int fd, uint32_t dst, uint32_t src)
>  	dst_offset = bb_offset + 4096;
>  	src_offset = dst_offset + WIDTH * HEIGHT * sizeof(uint32_t) * (src != dst);
>  
> -	batch[i++] = XY_SRC_COPY_BLT_CMD |
> -		  XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		  XY_SRC_COPY_BLT_WRITE_RGB;
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i - 1] |= 8;
> -	else
> -		batch[i - 1] |= 6;
> -
> -	batch[i++] = (3 << 24) | /* 32 bits */
> -		  (0xcc << 16) | /* copy ROP */
> -		  WIDTH*4;
> -	batch[i++] = 0; /* dst x1,y1 */
> -	batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> -	batch[i++] = dst_offset; /* dst reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = dst_offset >> 32;
> -	batch[i++] = 0; /* src x1,y1 */
> -	batch[i++] = WIDTH*4;
> -	batch[i++] = src_offset; /* src reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = src_offset >> 32;
> -	batch[i++] = MI_BATCH_BUFFER_END;
> -	batch[i++] = MI_NOOP;
> +	devid = intel_get_drm_devid(fd);
> +
> +	if (intel_graphics_ver(devid) >= IP_VER(12, 60)) {
> +		batch[i++] = XY_FAST_COPY_BLT;
> +		batch[i++] = XY_FAST_COPY_COLOR_DEPTH_32 | WIDTH*4;
> +		batch[i++] = 0;/* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH;/* dst x2,y2 */
> +		batch[i++] = dst_offset;/* dst address */
---------------------------- ^
This is lower 32-bits, also use lower_32_bits:

		batch[i++] = lower_32_bits(dst_offset);/* dst address */

and you need to follow-up with higer 32-bits, also use canonical
macro, so add:
		batch[i++] = higher_32_bits(CANONICAL(dst_offset));

> +		batch[i++] = 0;/* src x1,y1 */
> +		batch[i++] = WIDTH*4;/* src pitch */
> +		batch[i++] = src_offset;/* src address */

Same here, add higher bits.

> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	} else {
> +		batch[i++] = XY_SRC_COPY_BLT_CMD |
> +			     XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			     XY_SRC_COPY_BLT_WRITE_RGB;
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i - 1] |= 8;
> +		else
> +			batch[i - 1] |= 6;
> +
> +		batch[i++] = (3 << 24) | /* 32 bits */
> +			  (0xcc << 16) | /* copy ROP */
---------------------------- ^
> +			  WIDTH*4;
---------------------------- ^
Align.

> +		batch[i++] = 0; /* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> +		batch[i++] = dst_offset; /* dst reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = dst_offset >> 32;
> +		batch[i++] = 0; /* src x1,y1 */
> +		batch[i++] = WIDTH*4;
> +		batch[i++] = src_offset; /* src reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = src_offset >> 32;
> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	}
>  
>  	handle = gem_create(fd, 4096);
>  	gem_write(fd, handle, 0, batch, sizeof(batch));
> @@ -204,31 +220,52 @@ blit(int fd, uint32_t dst, uint32_t src, uint32_t *all_bo, int n_bo)
>  	struct drm_i915_gem_relocation_entry reloc[2];
>  	struct drm_i915_gem_exec_object2 *obj;
>  	struct drm_i915_gem_execbuffer2 exec;
> +	static uint32_t devid;
------- ^
Do not use static here.

>  	uint32_t handle;
> -	int n, ret, i=0;
> +	int n, ret, i = 0;
> +	uint64_t dst_offset, src_offset, bb_offset;
>  
> -	batch[i++] = XY_SRC_COPY_BLT_CMD |
> -		  XY_SRC_COPY_BLT_WRITE_ALPHA |
> -		  XY_SRC_COPY_BLT_WRITE_RGB;
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i - 1] |= 8;
> -	else
> -		batch[i - 1] |= 6;
> -	batch[i++] = (3 << 24) | /* 32 bits */
> -		  (0xcc << 16) | /* copy ROP */
> -		  WIDTH*4;
> -	batch[i++] = 0; /* dst x1,y1 */
> -	batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> -	batch[i++] = 0; /* dst reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = 0;
> -	batch[i++] = 0; /* src x1,y1 */
> -	batch[i++] = WIDTH*4;
> -	batch[i++] = 0; /* src reloc */
> -	if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> -		batch[i++] = 0;
> -	batch[i++] = MI_BATCH_BUFFER_END;
> -	batch[i++] = MI_NOOP;
> +	bb_offset = 16 << 20;
> +	dst_offset = bb_offset + 4096;
> +	src_offset = dst_offset + WIDTH * HEIGHT * sizeof(uint32_t) * (src != dst);
> +
> +	devid = intel_get_drm_devid(fd);
> +
> +	if (intel_graphics_ver(devid) >= IP_VER(12, 60)) {
> +		batch[i++] = XY_FAST_COPY_BLT;
> +		batch[i++] = XY_FAST_COPY_COLOR_DEPTH_32 | WIDTH*4;
> +		batch[i++] = 0;/* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH;/* dst x2,y2 */
> +		batch[i++] = dst_offset;/* dst address */

Same here, add higher 32-bits.

> +		batch[i++] = 0;/* src x1,y1 */
> +		batch[i++] = WIDTH*4;/* src pitch */
> +		batch[i++] = src_offset;//src address

Same here.

Regards,
Kamil

> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	} else {
> +		batch[i++] = XY_SRC_COPY_BLT_CMD |
> +			     XY_SRC_COPY_BLT_WRITE_ALPHA |
> +			     XY_SRC_COPY_BLT_WRITE_RGB;
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i - 1] |= 8;
> +		else
> +			batch[i - 1] |= 6;
> +		batch[i++] = (3 << 24) | /* 32 bits */
> +			     (0xcc << 16) | /* copy ROP */
> +			     WIDTH*4;
> +		batch[i++] = 0; /* dst x1,y1 */
> +		batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
> +		batch[i++] = dst_offset;/* dst reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = 0;
> +		batch[i++] = 0; /* src x1,y1 */
> +		batch[i++] = WIDTH*4;
> +		batch[i++] = src_offset; /* src reloc */
> +		if (intel_gen(intel_get_drm_devid(fd)) >= 8)
> +			batch[i++] = 0;
> +		batch[i++] = MI_BATCH_BUFFER_END;
> +		batch[i++] = MI_NOOP;
> +	}
>  
>  	handle = gem_create(fd, 4096);
>  	gem_write(fd, handle, 0, batch, sizeof(batch));
> -- 
> 2.25.1
>