[igt-dev] [PATCH i-g-t v3 09/12] i915/gem_mmap_offset: Verify all regions have nonblocking pagefaults
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Fri Sep 2 13:03:31 UTC 2022
On Fri, Sep 02, 2022 at 03:00:04PM +0200, Zbigniew Kempczyński wrote:
> From: Chris Wilson <chris.p.wilson at intel.com>
>
> Check that if we fault in a page that is active on the gpu, it doesn't
> wait for completion.
>
> Signed-off-by: Chris Wilson <chris.p.wilson at intel.com>
> ---
> tests/i915/gem_mmap_offset.c | 38 +++++++++++++++++++++++++++++++++++-
> 1 file changed, 37 insertions(+), 1 deletion(-)
>
> diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
> index c9a3eb5b94..8d47fdb735 100644
> --- a/tests/i915/gem_mmap_offset.c
> +++ b/tests/i915/gem_mmap_offset.c
> @@ -287,7 +287,7 @@ static void isolation(int i915)
> }
> }
>
> -static void pf_nonblock(int i915)
> +static void pf_nonblock_batch(int i915)
> {
> uint64_t ahnd = get_reloc_ahnd(i915, 0);
> igt_spin_t *spin = igt_spin_new(i915, .ahnd = ahnd);
> @@ -313,6 +313,42 @@ static void pf_nonblock(int i915)
> put_ahnd(ahnd);
> }
>
> +static void pf_nonblock(int i915)
> +{
> + uint64_t ahnd = get_reloc_ahnd(i915, 0);
> +
> + pf_nonblock_batch(i915);
> +
> + for_each_memory_region(r, i915) {
> + igt_spin_t *spin;
> + uint32_t handle;
> +
> + handle = gem_create_in_memory_region_list(i915, 4096, 0, &r->ci, 1);
> + spin = igt_spin_new(i915, .ahnd = ahnd, .dependency = handle);
> +
> + for_each_mmap_offset_type(i915, t) {
> + uint32_t *ptr;
> +
> + ptr = __mmap_offset(i915, handle, 0, 4096,
> + PROT_READ | PROT_WRITE,
> + t->type);
> + if (!ptr)
> + continue;
> +
> + igt_set_timeout(1, t->name);
> + /* no set-domain as we want to verify the pagefault is async */
> + ptr[256] = 0;
> + igt_reset_timeout();
> +
> + munmap(ptr, 4096);
> + }
> +
> + igt_spin_free(i915, spin);
> + gem_close(i915, handle);
> + }
> + put_ahnd(ahnd);
> +}
> +
> static void *memchr_inv(const void *s, int c, size_t n)
> {
> const uint8_t *us = s;
> --
> 2.34.1
>
Looks good for me.
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
--
Zbigniew
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