[igt-dev] [PATCH i-g-t 05/23] i915/perf: Bump timestamp tolerance for DG1

[Lionel Landwerlin]

On 23/08/2022 21:30, Umesh Nerlige Ramappa wrote:
> Timestamp deltas obtained from the batch vs the delta obtained from oa
> reports have a delta that's between 4 to 5 us in DG1. Adjust the test
> accordingly.
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

It's odd...

4/5us between 2 commands that follow each other exactly in a command stream?

Even if the PIPE_CONTROL stalls, it's supposed to write the timestamp 
after it's done stalling.

And the MI_REPORT_PERF_COUNT command is just after.


If you're sure there is no other explanation : Reviewed-by: Lionel 
Landwerlin <lionel.g.landwerlin at intel.com>


> ---
>   tests/i915/perf.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/tests/i915/perf.c b/tests/i915/perf.c
> index ca3ccc17..95600562 100644
> --- a/tests/i915/perf.c
> +++ b/tests/i915/perf.c
> @@ -4084,8 +4084,9 @@ static void gen12_single_ctx_helper(void)
>   	delta_delta = delta_ts64_ns > delta_oa32_ns ?
>   		      (delta_ts64_ns - delta_oa32_ns) :
>   		      (delta_oa32_ns - delta_ts64_ns);
> -	if (delta_delta > 500) {
> -		igt_debug("delta_delta exceeds margin, skipping..\n");
> +	if (delta_delta > 5000) {
> +		igt_debug("delta_delta = %d. exceeds margin, skipping..\n",
> +			  delta_delta);
>   		exit(EAGAIN);
>   	}
>