[igt-dev] [PATCH i-g-t 19/23] i915/perf: Wait longer for rc6 residency in DG2

Lionel Landwerlin lionel.g.landwerlin at intel.com
Tue Sep 6 14:18:03 UTC 2022


On 23/08/2022 21:30, Umesh Nerlige Ramappa wrote:
> igt at perf@rc6-disable waits for 50ms to check if we entered rc6. One some
> failures this seems to take longer to enter rc6, about 100ms. Tweak the
> test for DG2 to use a longer wait time.
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

Acked-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>

> ---
>   tests/i915/perf.c | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/tests/i915/perf.c b/tests/i915/perf.c
> index 6951735b..3ddfe587 100644
> --- a/tests/i915/perf.c
> +++ b/tests/i915/perf.c
> @@ -4441,7 +4441,10 @@ test_rc6_disable(void)
>   		.properties_ptr = to_user_pointer(properties),
>   	};
>   	unsigned long rc6_start, rc6_end, rc6_enabled;
> +	uint32_t rc6_duration;
>   
> +	/* On DG2, we wait longer to enter rc6 */
> +	rc6_duration = IS_DG2(devid) ? 100000 : 50000;
>   	rc6_enabled = 0;
>   	igt_sysfs_rps_scanf(sysfs, RC6_ENABLE, "%lu", &rc6_enabled);
>   	igt_require(rc6_enabled);
> @@ -4449,7 +4452,7 @@ test_rc6_disable(void)
>   	/* Verify rc6 is functional by measuring residency while idle */
>   	gem_quiescent_gpu(drm_fd);
>   	rc6_start = rc6_residency_ms();
> -	usleep(50000);
> +	usleep(rc6_duration);
>   	rc6_end = rc6_residency_ms();
>   	igt_require(rc6_end != rc6_start);
>   
> @@ -4457,7 +4460,7 @@ test_rc6_disable(void)
>   	stream_fd = __perf_open(drm_fd, &param, false);
>   
>   	rc6_start = rc6_residency_ms();
> -	usleep(50000);
> +	usleep(rc6_duration);
>   	rc6_end = rc6_residency_ms();
>   	igt_assert_eq(rc6_end - rc6_start, 0);
>   
> @@ -4466,7 +4469,7 @@ test_rc6_disable(void)
>   
>   	/* But once OA is closed, we expect the device to sleep again */
>   	rc6_start = rc6_residency_ms();
> -	usleep(50000);
> +	usleep(rc6_duration);
>   	rc6_end = rc6_residency_ms();
>   	igt_assert_neq(rc6_end - rc6_start, 0);
>   }




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