[igt-dev] [PATCH v3 2/2] tests/intel/kms_pm_dc: Add LNL platform for dc9-dpms validation
Mohammed Thasleem
mohammed.thasleem at intel.com
Fri Dec 1 10:07:25 UTC 2023
DC5 counter on disp ver >=14 is not expected to get reset in DC9 state.
Add LNL patform to use runtime_suspended_time value to validate DC9
dpms test.
v2: Update subject and commit message. (Swati)
v3: Move lib/intel_chipset.h changes in separate patch. (Kamil)
Cc: Swati Sharma <swati2.sharma at intel.com>
Signed-off-by: Mohammed Thasleem <mohammed.thasleem at intel.com>
---
tests/intel/kms_pm_dc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index 8006e54de..0d5824e67 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -88,7 +88,7 @@
#define KMS_HELPER "/sys/module/drm_kms_helper/parameters/"
#define PACKAGE_CSTATE_PATH "pmc_core/package_cstate_show"
#define KMS_POLL_DISABLE 0
-#define DC9_RESETS_DC_COUNTERS(devid) (!(IS_DG1(devid) || IS_DG2(devid) || IS_METEORLAKE(devid)))
+#define DC9_RESETS_DC_COUNTERS(devid) (!(IS_DG1(devid) || IS_DG2(devid) || AT_LEAST_DISPLAY(devid, 14)))
IGT_TEST_DESCRIPTION("Tests to validate display power DC states.");
@@ -505,7 +505,7 @@ static bool dc9_wait_entry(data_t *data, int dc_target, int prev_dc, int prev_rp
* Runtime suspended residency should increment once DC9 is achieved;
* this condition is valid for all platforms.
* However, resetting of dc5/dc6 counter to check if display engine was in DC9;
- * this condition at present can be skipped for dg1, dg2 and MTL platforms.
+ * this condition at present can be skipped for dg1, dg2 and MTL+ platforms.
*/
return igt_wait((read_runtime_suspended_time(data->drm_fd) > prev_rpm) &&
(!DC9_RESETS_DC_COUNTERS(data->devid) ||
--
2.25.1
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