[igt-dev] [PATCH i-g-t 06/15] intel_gpu_top: Add an array of freq and rc6 counters
Umesh Nerlige Ramappa
umesh.nerlige.ramappa at intel.com
Sat May 13 02:22:25 UTC 2023
Since rc6 and frequency events are specific to a tile in multi-tile platforms,
prepare support for multi-tile by storing these events in an array.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
---
tools/intel_gpu_top.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index b6827b3de..3d21f25bd 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -87,6 +87,7 @@ struct engine_class {
unsigned int num_engines;
};
+#define MAX_GTS 4
struct engines {
unsigned int num_engines;
unsigned int num_classes;
@@ -106,9 +107,12 @@ struct engines {
unsigned int num_imc;
struct pmu_counter freq_req;
+ struct pmu_counter freq_req_gt[MAX_GTS];
struct pmu_counter freq_act;
+ struct pmu_counter freq_act_gt[MAX_GTS];
struct pmu_counter irq;
struct pmu_counter rc6;
+ struct pmu_counter rc6_gt[MAX_GTS];
bool discrete;
char *device;
--
2.36.1
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