[igt-dev] [PATCH i-g-t 00/15] PMU: multi-tile support
Umesh Nerlige Ramappa
umesh.nerlige.ramappa at intel.com
Sat May 13 02:22:19 UTC 2023
Enable IGT PMU support for multi-tile platforms.
Add multi-tile support for intel_gpu_top.
v2: (Tvrtko)
- Instead of adding gtN suffix to item, add it to parent group
- Show split gt values only if -p option is specified
- Display aggregate value as default without -p option
- Break down patches into reviewable units
v3: (Ashutosh, Tvrtko)
- Reformat GT info in INTERACTIVE mode
- Use i915_for_each_gt
- Move uapi to i915_drm_local.h
- Use gem_list_engines() and drop unnecessary code
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>
Riana Tauro (1):
perf_pmu: Use correct pmu config for multi-tile
Tvrtko Ursulin (3):
perf_pmu: Support multi-tile in rc6 subtest
perf_pmu: Two new rc6 subtests
perf_pmu: Support multi-tile in frequency subtest
Umesh Nerlige Ramappa (11):
perf_pmu: Quiesce GPU if measuring idle busyness without spinner
intel_gpu_top: Add an array of freq and rc6 counters
intel_gpu_top: Determine number of tiles
intel_gpu_top: Capture freq and rc6 counters from each gt
intel_gpu_top: Switch pmu_counter to use aggregated values
intel_gpu_top: Add definitions for gt-specific items and groups
intel_gpu_top: Bump up size of groups to accomodate multi-gt
intel_gpu_top: Increase visibility for class_view
intel_gpu_top: Show gt specific values if requested
intel_gpu_top: Reduce one level of indent
intel_gpu_top: Add gt specific values to header in interactive mode
lib/i915/i915_drm_local.h | 15 ++
tests/i915/perf_pmu.c | 307 +++++++++++++++++++++++++++-----------
tools/intel_gpu_top.c | 238 ++++++++++++++++++++++++-----
3 files changed, 432 insertions(+), 128 deletions(-)
--
2.36.1
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