[igt-dev] [PATCH i-g-t v1.1] lib/intel_blt: Support xe2 in ctrl-surf-copy command
Lucas De Marchi
lucas.demarchi at intel.com
Mon Sep 18 21:13:28 UTC 2023
Xe2 ctrl-surf-copy command varies significantly from gen12. Create a new
struct and function to fill the data, sharing the rest of the logic in
emit_blt_ctrl_surf_copy().
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
---
lib/intel_blt.c | 128 ++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 107 insertions(+), 21 deletions(-)
diff --git a/lib/intel_blt.c b/lib/intel_blt.c
index 508c2de46..38664a6fd 100644
--- a/lib/intel_blt.c
+++ b/lib/intel_blt.c
@@ -962,6 +962,65 @@ struct gen12_ctrl_surf_copy_data {
} dw04;
};
+struct xe2_ctrl_surf_copy_data {
+ struct {
+ uint32_t length: BITRANGE(0, 7);
+ uint32_t rsvd0: BITRANGE(8, 8);
+ uint32_t size_of_ctrl_copy: BITRANGE(9, 18);
+ uint32_t rsvd1: BITRANGE(19, 19);
+ uint32_t dst_access_type: BITRANGE(20, 20);
+ uint32_t src_access_type: BITRANGE(21, 21);
+ uint32_t opcode: BITRANGE(22, 28);
+ uint32_t client: BITRANGE(29, 31);
+ } dw00;
+
+ struct {
+ uint32_t src_address_lo;
+ } dw01;
+
+ struct {
+ uint32_t src_address_hi: BITRANGE(0, 24);
+ uint32_t pad: BITRANGE(25, 27);
+ uint32_t src_mocs: BITRANGE(28, 31);
+ } dw02;
+
+ struct {
+ uint32_t dst_address_lo;
+ } dw03;
+
+ struct {
+ uint32_t dst_address_hi: BITRANGE(0, 24);
+ uint32_t pad: BITRANGE(25, 27);
+ uint32_t dst_mocs: BITRANGE(28, 31);
+ } dw04;
+};
+
+union ctrl_surf_copy_data {
+ struct gen12_ctrl_surf_copy_data gen12;
+ struct xe2_ctrl_surf_copy_data xe2;
+};
+
+static void xe2_dump_bb_surf_ctrl_cmd(const struct xe2_ctrl_surf_copy_data *data)
+{
+ uint32_t *cmd = (uint32_t *) data;
+
+ igt_info("details:\n");
+ igt_info(" dw00: [%08x] <client: 0x%x, opcode: 0x%x, "
+ "src/dst access type: <%d, %d>, size of ctrl copy: %u, length: %d>\n",
+ cmd[0],
+ data->dw00.client, data->dw00.opcode,
+ data->dw00.src_access_type, data->dw00.dst_access_type,
+ data->dw00.size_of_ctrl_copy, data->dw00.length);
+ igt_info(" dw01: [%08x] src offset lo (0x%x)\n",
+ cmd[1], data->dw01.src_address_lo);
+ igt_info(" dw02: [%08x] src offset hi (0x%x), src mocs idx: %u\n",
+ cmd[2], data->dw02.src_address_hi, data->dw02.src_mocs);
+ igt_info(" dw03: [%08x] dst offset lo (0x%x)\n",
+ cmd[3], data->dw03.dst_address_lo);
+ igt_info(" dw04: [%08x] dst offset hi (0x%x), src mocs idx: %u\n",
+ cmd[4], data->dw04.dst_address_hi, data->dw04.dst_mocs);
+}
+
static void dump_bb_surf_ctrl_cmd(const struct gen12_ctrl_surf_copy_data *data)
{
uint32_t *cmd = (uint32_t *) data;
@@ -1020,7 +1079,9 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
uint64_t bb_pos,
bool emit_bbe)
{
- struct gen12_ctrl_surf_copy_data data = {};
+ unsigned int ip_ver = intel_graphics_ver(intel_get_drm_devid(fd));
+ union ctrl_surf_copy_data data = { };
+ size_t data_sz;
uint64_t dst_offset, src_offset, bb_offset, alignment;
uint32_t bbe = MI_BATCH_BUFFER_END;
uint32_t *bb;
@@ -1029,33 +1090,55 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
igt_assert_f(surf, "ctrl-surf-copy requires data to do ctrl-surf-copy blit\n");
alignment = max_t(uint64_t, get_default_alignment(fd, surf->driver), 1ull << 16);
-
- data.dw00.client = 0x2;
- data.dw00.opcode = 0x48;
- data.dw00.src_access_type = surf->src.access_type;
- data.dw00.dst_access_type = surf->dst.access_type;
-
- /* Ensure dst has size capable to keep src ccs aux */
- data.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
- data.dw00.length = 0x3;
-
src_offset = get_offset(ahnd, surf->src.handle, surf->src.size, alignment);
dst_offset = get_offset(ahnd, surf->dst.handle, surf->dst.size, alignment);
bb_offset = get_offset(ahnd, surf->bb.handle, surf->bb.size, alignment);
- data.dw01.src_address_lo = src_offset;
- data.dw02.src_address_hi = src_offset >> 32;
- data.dw02.src_mocs = surf->src.mocs;
+ if (ip_ver >= IP_VER(20, 0)) {
+ data.xe2.dw00.client = 0x2;
+ data.xe2.dw00.opcode = 0x48;
+ data.xe2.dw00.src_access_type = surf->src.access_type;
+ data.xe2.dw00.dst_access_type = surf->dst.access_type;
+
+ /* Ensure dst has size capable to keep src ccs aux */
+ data.xe2.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
+ data.xe2.dw00.length = 0x3;
+
+ data.xe2.dw01.src_address_lo = src_offset;
+ data.xe2.dw02.src_address_hi = src_offset >> 32;
+ data.xe2.dw02.src_mocs = surf->src.mocs;
+
+ data.xe2.dw03.dst_address_lo = dst_offset;
+ data.xe2.dw04.dst_address_hi = dst_offset >> 32;
+ data.xe2.dw04.dst_mocs = surf->dst.mocs;
+
+ data_sz = sizeof(data.xe2);
+ } else {
+ data.gen12.dw00.client = 0x2;
+ data.gen12.dw00.opcode = 0x48;
+ data.gen12.dw00.src_access_type = surf->src.access_type;
+ data.gen12.dw00.dst_access_type = surf->dst.access_type;
+
+ /* Ensure dst has size capable to keep src ccs aux */
+ data.gen12.dw00.size_of_ctrl_copy = __ccs_size(surf) / CCS_RATIO - 1;
+ data.gen12.dw00.length = 0x3;
+
+ data.gen12.dw01.src_address_lo = src_offset;
+ data.gen12.dw02.src_address_hi = src_offset >> 32;
+ data.gen12.dw02.src_mocs = surf->src.mocs;
+
+ data.gen12.dw03.dst_address_lo = dst_offset;
+ data.gen12.dw04.dst_address_hi = dst_offset >> 32;
+ data.gen12.dw04.dst_mocs = surf->dst.mocs;
- data.dw03.dst_address_lo = dst_offset;
- data.dw04.dst_address_hi = dst_offset >> 32;
- data.dw04.dst_mocs = surf->dst.mocs;
+ data_sz = sizeof(data.gen12);
+ }
bb = bo_map(fd, surf->bb.handle, surf->bb.size, surf->driver);
- igt_assert(bb_pos + sizeof(data) < surf->bb.size);
- memcpy(bb + bb_pos, &data, sizeof(data));
- bb_pos += sizeof(data);
+ igt_assert(bb_pos + data_sz < surf->bb.size);
+ memcpy(bb + bb_pos, &data, data_sz);
+ bb_pos += data_sz;
if (emit_bbe) {
igt_assert(bb_pos + sizeof(uint32_t) < surf->bb.size);
@@ -1069,7 +1152,10 @@ uint64_t emit_blt_ctrl_surf_copy(int fd,
", bb offset: %" PRIx64 "\n",
src_offset, dst_offset, bb_offset);
- dump_bb_surf_ctrl_cmd(&data);
+ if (ip_ver >= IP_VER(20, 0))
+ xe2_dump_bb_surf_ctrl_cmd(&data.xe2);
+ else
+ dump_bb_surf_ctrl_cmd(&data.gen12);
}
munmap(bb, surf->bb.size);
--
2.40.1
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