[PATCH i-g-t 2/2] tests/intel/xe_pm: Add mocs suspend resume test

[Kumar, Janga Rahul]

> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper at intel.com>
> Sent: Saturday, March 23, 2024 2:55 AM
> To: Kumar, Janga Rahul <janga.rahul.kumar at intel.com>
> Cc: igt-dev at lists.freedesktop.org; Gandi, Ramadevi
> <ramadevi.gandi at intel.com>
> Subject: Re: [PATCH i-g-t 2/2] tests/intel/xe_pm: Add mocs suspend resume test
> 
> On Thu, Mar 21, 2024 at 08:46:37PM +0530, janga.rahul.kumar at intel.com
> wrote:
> > From: Janga Rahul Kumar <janga.rahul.kumar at intel.com>
> >
> > Add test to check mocs values are retained over suspend/resume.
> >
> > Cc: Matt Roper <matthew.d.roper at intel.com>
> > Signed-off-by: Janga Rahul Kumar <janga.rahul.kumar at intel.com>
> > ---
> >  tests/intel/xe_pm.c | 43 +++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 43 insertions(+)
> >
> > diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c index
> > fcbed6249..0761d59c4 100644
> > --- a/tests/intel/xe_pm.c
> > +++ b/tests/intel/xe_pm.c
> > @@ -560,6 +560,45 @@ static void test_mmap(device_t device, uint32_t
> placement, uint32_t flags)
> >  	close(fw_handle);
> >  }
> >
> > +/**
> > + * SUBTEST: mocs_suspend_resume
> > + * Description:
> > + *     Validate mocs register contents over suspend resume
> > + *
> > + * Functionality: mocs
> > + * Run type: FULL
> > + */
> > +static void test_mocs_suspend_resume(device_t device) {
> > +	int gt;
> > +
> > +	xe_for_each_gt(device.fd_xe, gt) {
> > +		char path[256];
> > +
> > +		// Mocs debugfs contents before and after suspend-resume
> > +		char mocs_content_pre[4096], mocs_contents_post[4096];
> > +
> > +		sprintf(path, "gt%d/mocs", gt);
> > +		igt_assert(igt_debugfs_exists(device.fd_xe, path, O_RDONLY));
> > +		igt_debugfs_dump(device.fd_xe, path);
> > +		igt_debugfs_read(device.fd_xe, path, mocs_content_pre);
> > +
> > +		fw_handle = igt_debugfs_open(device.fd_xe, "forcewake_all",
> O_RDONLY);
> > +		igt_assert(fw_handle >= 0);
> > +		igt_assert(igt_get_runtime_pm_status() ==
> > +IGT_RUNTIME_PM_STATUS_ACTIVE);
> > +
> > +		/* Runtime suspend  */
> > +		close(fw_handle);
> > +
> >
> +igt_assert(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED));
> > +
> > +		igt_assert(igt_debugfs_exists(device.fd_xe, path, O_RDONLY));
> > +		igt_debugfs_dump(device.fd_xe, path);
> > +		igt_debugfs_read(device.fd_xe, path, mocs_contents_post);
> > +
> > +		igt_assert(strcmp(mocs_content_pre, mocs_contents_post) ==
> 0);
> > +	}
> > +}
> 
> Assuming xe_pm has already ensured that anything else that might have blocked
> runtime PM is out of the way, looks good to me.  But should we also test S3 and
> S4 as well rather than just runtime suspend?  Those follow different driver flows,
> and it's possible a driver bug could cause of to fail to reprogram MOCS on an
> S3/S4 resume, even though runtime PM resume works okay.
Sent v2 with S3/S4 s/r state.

> 
> It would also be good to extend this same pattern to other kinds of non-PM
> MOCS tests as well.  E.g., for reset IGTs it would be valuable to have subtests
Will send a separate series targeting reset and engine hang/reset.

Thanks,
Rahul
> like:
> 
>         a = capture
>         trigger engine hang & reset
>         b = capture
>         fail if a != b
> 
> and
> 
>         a = capture
>         trigger full GT reset
>         b = capture
>         fail if a != b
> 
> 
> Matt
> 
> > +
> >  igt_main
> >  {
> >  	struct drm_xe_engine_class_instance *hwe; @@ -701,6 +740,10 @@
> > igt_main
> >  			dpms_on_off(device, DRM_MODE_DPMS_ON);
> >  			igt_pm_set_autosuspend_delay(device.pci_xe,
> delay_ms);
> >  		}
> > +
> > +		igt_subtest("mocs_suspend_resume")
> > +			test_mocs_suspend_resume(device);
> > +
> >  	}
> >
> >  	igt_fixture {
> > --
> > 2.25.1
> >
> 
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation