[PATCH i-g-t 6/7] lib/rendercopy_gen9: Allow to use all tilings on flatccs platforms

[Zbigniew Kempczyński]

On Thu, Apr 25, 2024 at 03:26:12PM +0300, Juha-Pekka Heikkila wrote:
> On 25.4.2024 13.47, Zbigniew Kempczyński wrote:
> > Instead of limiting compression to Tile4 lets enable it for any
> > tiling when platform has flatccs area.
> > 
> > Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
> > ---
> >   lib/rendercopy_gen9.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
> > index 7c7563d50c..67bb7cfacd 100644
> > --- a/lib/rendercopy_gen9.c
> > +++ b/lib/rendercopy_gen9.c
> > @@ -175,6 +175,7 @@ gen9_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst,
> >   		case 64: ss->ss0.surface_format = SURFACEFORMAT_R16G16B16A16_FLOAT; break;
> >   		default: igt_assert(0);
> >   	}
> > +
> >   	ss->ss0.vertical_alignment = 1; /* align 4 */
> >   	ss->ss0.horizontal_alignment = 1; /* align 4 or HALIGN_32 on display ver >= 13*/
> > @@ -232,7 +233,6 @@ gen9_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst,
> >   		ss->ss6.aux_mode = 0x5; /* AUX_CCS_E */
> >   		if (buf->ccs[0].stride) {
> > -
> >   			ss->ss6.aux_pitch = (buf->ccs[0].stride / 128) - 1;
> >   			address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
> > @@ -268,7 +268,7 @@ gen9_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst,
> >   			ss->ss13.clear_address_hi = (address + buf->cc.offset) >> 32;
> >   		}
> > -		if (HAS_4TILE(ibb->devid)) {
> > +		if (HAS_FLATCCS(ibb->devid)) {
> 
> This I suspect will break mtl. Those few above blank line changes probably
> also here as not needed 'extra'.

You're right. I've checked how compressed surface looks on mtl and it is
compressed but looks different than tile4 compressed surface. Thanks for
spotting this.

--
Zbigniew

> 
> /Juha-Pekka
> 
> >   			ss->ss7.dg2.memory_compression_type = 0;
> >   			ss->ss7.dg2.memory_compression_enable = 0;
> >   			ss->ss7.dg2.disable_support_for_multi_gpu_partial_writes = 1;
>