[PATCH RFC i-g-t 2/2] tests/intel/xe_svm: basic xe_svm test

[Bommu Krishnaiah]

Add basic test to validate helper functions introduced in
'lib/xe/xe_util: helper function'. This test writes values
to the destination buffer using GPU (MI_STORE_DWORD_IMM_GEN4).

Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu at intel.com>
Cc: Oak Zeng <oak.zeng at intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray at intel.com>
---
 tests/intel/xe_svm.c | 99 ++++++++++++++++++++++++++++++++++++++++++++
 tests/meson.build    |  1 +
 2 files changed, 100 insertions(+)
 create mode 100644 tests/intel/xe_svm.c

diff --git a/tests/intel/xe_svm.c b/tests/intel/xe_svm.c
new file mode 100644
index 000000000..a954861bc
--- /dev/null
+++ b/tests/intel/xe_svm.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: MIT
+ /*
+  * Copyright © 2023 Intel Corporation
+  */
+
+/** @file xe_svm.c
+ *
+ * Test shared virtual memory.
+ *
+ * Shared virtual memory(svm in short) is a xe driver feature
+ * which provide shared virtual address space b/t CPU and GPU
+ * program. This means application writer can just malloc or mmap,
+ * and use the returned ptr for both CPU and GPU program.
+ *
+ * This test the shared virtual memory functions. This includes
+ * basic malloc, mmap test, an invalid va tess, a mprotect test and a
+ * random access test.
+ */
+
+/**
+ * TEST: xe_svm
+ * Description: Test shared virtual memory
+ * Sub-category: Memory management
+ * Functionality: svm
+ * Run type: FULL
+ *
+ * SUBTEST: svm-basic-malloc
+ */
+
+#include <fcntl.h>
+
+#include "igt.h"
+#include "lib/igt_syncobj.h"
+#include "lib/intel_reg.h"
+#include "lib/xe/xe_util.h"
+#include "xe_drm.h"
+
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
+#include <string.h>
+
+/**
+ * Use malloc or mmap memory for direct GPU submission
+ */
+static void svm_basic(int fd, uint32_t vm, struct drm_xe_engine_class_instance *eci)
+{
+	uint64_t gpu_va = 0x1a0000;
+	uint32_t val = 0xc0ffee;
+	size_t bo_size = xe_bb_size(fd, PAGE_ALIGN_UFENCE);
+
+	struct xe_buffer dst_buf = {
+           .fd = fd,
+           .gpu_addr = (uint64_t)gpu_va,
+	   .vm = vm,
+	   .size = bo_size,
+	   .placement = vram_if_possible(fd, eci->gt_id),
+	   .flag = DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
+     };
+
+     struct xe_buffer cmd_buf = {
+           .fd = fd,
+           .gpu_addr = (uint64_t)gpu_va + bo_size,
+	   .vm = vm,
+	   .size = bo_size,
+	   .placement = vram_if_possible(fd, eci->gt_id),
+	   .flag = DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
+     };
+
+     xe_create_buffer(&dst_buf);
+     xe_create_cmdbuf(&cmd_buf, insert_store, (uint64_t)dst_buf.gpu_addr, val, eci);
+     xe_submit_cmd(&cmd_buf);
+     igt_assert_eq(*(uint32_t *)dst_buf.cpu_addr, val);
+     xe_destroy_cmdbuf(&cmd_buf);
+     xe_destroy_buffer(&dst_buf);
+}
+
+igt_main
+{
+	int fd;
+	uint32_t vm;
+	struct drm_xe_engine_class_instance *hwe;
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_XE);
+		igt_require(xe_supports_faults(fd));
+		vm = xe_vm_create(fd, DRM_XE_VM_CREATE_FLAG_LR_MODE | DRM_XE_VM_CREATE_FLAG_FAULT_MODE, 0);
+	}
+
+
+	igt_subtest_f("svm-basic-malloc")
+		xe_for_each_engine(fd, hwe)
+			svm_basic(fd, vm, hwe);
+
+	igt_fixture {
+		xe_vm_destroy(fd, vm);
+		drm_close_driver(fd);
+	}
+}
+
diff --git a/tests/meson.build b/tests/meson.build
index 65b8bf23b..6bdd76343 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -316,6 +316,7 @@ intel_xe_progs = [
 	'xe_spin_batch',
 	'xe_sysfs_defaults',
 	'xe_sysfs_scheduler',
+	'xe_svm',
 ]
 
 msm_progs = [
-- 
2.25.1