[PATCH i-g-t v3 07/14] lib/gpgpu_shader: Add write_on_exception template
Grzegorzek, Dominik
dominik.grzegorzek at intel.com
Mon Aug 19 10:09:15 UTC 2024
On Fri, 2024-08-09 at 14:38 +0200, Christoph Manszewski wrote:
> From: Andrzej Hajda <andrzej.hajda at intel.com>
>
> Writing specific value to memory location on unexpected value in exception
> register allows to report errors from inside shader or siplet.
>
> Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
> Signed-off-by: Christoph Manszewski <christoph.manszewski at intel.com>
> ---
> lib/gpgpu_shader.c | 56 ++++++++++++++++++++++++++
> lib/gpgpu_shader.h | 2 +
> lib/iga64_generated_codes.c | 79 ++++++++++++++++++++++++++++++++++++-
> 3 files changed, 136 insertions(+), 1 deletion(-)
>
> diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c
> index 3b16db593..a98abc57e 100644
> --- a/lib/gpgpu_shader.c
> +++ b/lib/gpgpu_shader.c
> @@ -628,6 +628,62 @@ void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value,
> ", 2, y_offset, 3, value, value, value, value);
> }
>
> +/**
> + * gpgpu_shader__write_on_exception:
> + * @shdr: shader to be modified
> + * @value: dword to be written
> + * @y_offset: write target offset within the surface in rows
> + * @mask: mask to be applied on exception register
> + * @expected: expected value of exception register with @mask applied
> + *
> + * Check if bits specified by @mask in exception register(cr0.1) are equal
> + * to provided ones: cr0.1 & @mask == @expected,
> + * if yes fill dword in (row, column/dword) == (tg_id_y + @y_offset, tg_id_x).
> + */
> +void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t value,
> + uint32_t y_offset, uint32_t mask, uint32_t expected)
> +{
> + emit_iga64_code(shdr, write_on_exception, " \n\
> + // Payload \n\
> +(W) mov (1|M0) r5.0<1>:ud ARG(3):ud \n\
> +(W) mov (1|M0) r5.1<1>:ud ARG(4):ud \n\
> +(W) mov (1|M0) r5.2<1>:ud ARG(5):ud \n\
> +(W) mov (1|M0) r5.3<1>:ud ARG(6):ud \n\
> +#if GEN_VER < 2000 // prepare Media Block Write \n\
> + // X offset of the block in bytes := (thread group id X << ARG(0)) \n\
> +(W) shl (1|M0) r4.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\
> + // Y offset of the block in rows := thread group id Y \n\
> +(W) mov (1|M0) r4.1<1>:ud r0.6<0;1,0>:ud \n\
> +(W) add (1|M0) r4.1<1>:ud r4.1<0;1,0>:ud ARG(1):ud \n\
> + // block width [0,63] representing 1 to 64 bytes \n\
> +(W) mov (1|M0) r4.2<1>:ud ARG(2):ud \n\
> + // FFTID := FFTID from R0 header \n\
> +(W) mov (1|M0) r4.4<1>:ud r0.5<0;1,0>:ud \n\
> +#else // prepare Typed 2D Block Store \n\
> + // Load r2.0-3 with tg id X << ARG(0) \n\
> +(W) shl (1|M0) r2.0<1>:ud r0.1<0;1,0>:ud ARG(0):ud \n\
> + // Load r2.4-7 with tg id Y + ARG(1):ud \n\
> +(W) mov (1|M0) r2.1<1>:ud r0.6<0;1,0>:ud \n\
> +(W) add (1|M0) r2.1<1>:ud r2.1<0;1,0>:ud ARG(1):ud \n\
> + // payload setup \n\
> +(W) mov (16|M0) r4.0<1>:ud 0x0:ud \n\
Move r4.0 clearing part before to common code before the if statement like in [1].
For < 2000 we depend on clear r4.0 register. If it was used before, by any different shader, we may
have broken code.
[1] https://patchwork.freedesktop.org/patch/608230/?series=137284&rev=2
With that, it is:
Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
> + // Store X and Y block start (160:191 and 192:223) \n\
> +(W) mov (2|M0) r4.5<1>:ud r2.0<2;2,1>:ud \n\
> + // Store X and Y block max_size (224:231 and 232:239) \n\
> +(W) mov (1|M0) r4.7<1>:ud ARG(2):ud \n\
> +#endif \n\
> + // Check if masked exception is equal to provided value and write conditionally \n\
> +(W) and (1|M0) r3.0<1>:ud cr0.1<0;1,0>:ud ARG(7):ud \n\
> +(W) mov (1|M0) f0.0<1>:ud 0x0:ud \n\
> +(W) cmp (1|M0) (eq)f0.0 null:ud r3.0<0;1,0>:ud ARG(8):ud \n\
> +#if GEN_VER < 2000 // Media Block Write \n\
> +(W&f0.0) send.dc1 (16|M0) null r4 src1_null 0 0x40A8000 \n\
> +#else // Typed 2D Block Store \n\
> +(W&f0.0) send.tgm (16|M0) null r4 null:0 0 0x64000007 \n\
> +#endif \n\
> + ", 2, y_offset, 3, value, value, value, value, mask, expected);
> +}
> +
> /**
> * gpgpu_shader__end_system_routine:
> * @shdr: shader to be modified
> diff --git a/lib/gpgpu_shader.h b/lib/gpgpu_shader.h
> index e4ca0be4c..76ff4989e 100644
> --- a/lib/gpgpu_shader.h
> +++ b/lib/gpgpu_shader.h
> @@ -74,6 +74,8 @@ void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr,
> void gpgpu_shader__write_aip(struct gpgpu_shader *shdr, uint32_t y_offset);
> void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value,
> uint32_t y_offset);
> +void gpgpu_shader__write_on_exception(struct gpgpu_shader *shdr, uint32_t dw,
> + uint32_t y_offset, uint32_t mask, uint32_t value);
> void gpgpu_shader__label(struct gpgpu_shader *shdr, int label_id);
> void gpgpu_shader__jump(struct gpgpu_shader *shdr, int label_id);
> void gpgpu_shader__jump_neq(struct gpgpu_shader *shdr, int label_id,
> diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c
> index fea436dee..71429d442 100644
> --- a/lib/iga64_generated_codes.c
> +++ b/lib/iga64_generated_codes.c
> @@ -3,7 +3,7 @@
>
> #include "gpgpu_shader.h"
>
> -#define MD5_SUM_IGA64_ASMS 61a15534954fe7c6bd0e983fbfd54c27
> +#define MD5_SUM_IGA64_ASMS 88529cc180578939c0b8c4bb29da7db6
>
> struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = {
> { .gen_ver = 2000, .size = 44, .code = (const uint32_t []) {
> @@ -93,6 +93,83 @@ struct iga64_template const iga64_code_breakpoint_suppress[] = {
> }}
> };
>
> +struct iga64_template const iga64_code_write_on_exception[] = {
> + { .gen_ver = 2000, .size = 68, .code = (const uint32_t []) {
> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
> + 0x80000061, 0x05154220, 0x00000000, 0xc0ded004,
> + 0x80000061, 0x05254220, 0x00000000, 0xc0ded005,
> + 0x80000061, 0x05354220, 0x00000000, 0xc0ded006,
> + 0x80000069, 0x02058220, 0x02000014, 0xc0ded000,
> + 0x80000061, 0x02150220, 0x00000064, 0x00000000,
> + 0x80001940, 0x02158220, 0x02000214, 0xc0ded001,
> + 0x80100061, 0x04054220, 0x00000000, 0x00000000,
> + 0x80041a61, 0x04550220, 0x00220205, 0x00000000,
> + 0x80000061, 0x04754220, 0x00000000, 0xc0ded002,
> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded007,
> + 0x80000961, 0x30014220, 0x00000000, 0x00000000,
> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded008,
> + 0x84134031, 0x00000000, 0xd00e0494, 0x04000000,
> + 0x80000001, 0x00010000, 0x20000000, 0x00000000,
> + 0x80000001, 0x00010000, 0x30000000, 0x00000000,
> + 0x80000901, 0x00010000, 0x00000000, 0x00000000,
> + }},
> + { .gen_ver = 1272, .size = 64, .code = (const uint32_t []) {
> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
> + 0x80000061, 0x05154220, 0x00000000, 0xc0ded004,
> + 0x80000061, 0x05254220, 0x00000000, 0xc0ded005,
> + 0x80000061, 0x05354220, 0x00000000, 0xc0ded006,
> + 0x80000069, 0x04058220, 0x02000014, 0xc0ded000,
> + 0x80000061, 0x04150220, 0x00000064, 0x00000000,
> + 0x80001940, 0x04158220, 0x02000414, 0xc0ded001,
> + 0x80000061, 0x04254220, 0x00000000, 0xc0ded002,
> + 0x80000061, 0x04450220, 0x00000054, 0x00000000,
> + 0x80000965, 0x03058220, 0x02008010, 0xc0ded007,
> + 0x80000961, 0x30014220, 0x00000000, 0x00000000,
> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded008,
> + 0x84134031, 0x00000000, 0xc0000414, 0x02a00000,
> + 0x80000001, 0x00010000, 0x20000000, 0x00000000,
> + 0x80000001, 0x00010000, 0x30000000, 0x00000000,
> + 0x80000901, 0x00010000, 0x00000000, 0x00000000,
> + }},
> + { .gen_ver = 1250, .size = 68, .code = (const uint32_t []) {
> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
> + 0x80000061, 0x05254220, 0x00000000, 0xc0ded004,
> + 0x80000061, 0x05454220, 0x00000000, 0xc0ded005,
> + 0x80000061, 0x05654220, 0x00000000, 0xc0ded006,
> + 0x80000069, 0x04058220, 0x02000024, 0xc0ded000,
> + 0x80000061, 0x04250220, 0x000000c4, 0x00000000,
> + 0x80001940, 0x04258220, 0x02000424, 0xc0ded001,
> + 0x80000061, 0x04454220, 0x00000000, 0xc0ded002,
> + 0x80000061, 0x04850220, 0x000000a4, 0x00000000,
> + 0x80000965, 0x03058220, 0x02008020, 0xc0ded007,
> + 0x80000961, 0x30014220, 0x00000000, 0x00000000,
> + 0x80001a70, 0x00018220, 0x12000304, 0xc0ded008,
> + 0x80001a01, 0x00010000, 0x00000000, 0x00000000,
> + 0x81044031, 0x00000000, 0xc0000414, 0x02a00000,
> + 0x80000001, 0x00010000, 0x20000000, 0x00000000,
> + 0x80000001, 0x00010000, 0x30000000, 0x00000000,
> + 0x80000901, 0x00010000, 0x00000000, 0x00000000,
> + }},
> + { .gen_ver = 0, .size = 64, .code = (const uint32_t []) {
> + 0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
> + 0x80000061, 0x05254220, 0x00000000, 0xc0ded004,
> + 0x80000061, 0x05454220, 0x00000000, 0xc0ded005,
> + 0x80000061, 0x05654220, 0x00000000, 0xc0ded006,
> + 0x80000069, 0x04058220, 0x02000024, 0xc0ded000,
> + 0x80000061, 0x04250220, 0x000000c4, 0x00000000,
> + 0x80000140, 0x04258220, 0x02000424, 0xc0ded001,
> + 0x80000061, 0x04454220, 0x00000000, 0xc0ded002,
> + 0x80000061, 0x04850220, 0x000000a4, 0x00000000,
> + 0x80000165, 0x03058220, 0x02008020, 0xc0ded007,
> + 0x80000161, 0x30014220, 0x00000000, 0x00000000,
> + 0x80000270, 0x00018220, 0x12000304, 0xc0ded008,
> + 0x8104a031, 0x00000000, 0xc0000414, 0x02a00000,
> + 0x80000001, 0x00010000, 0x20000000, 0x00000000,
> + 0x80000001, 0x00010000, 0x30000000, 0x00000000,
> + 0x80000101, 0x00010000, 0x00000000, 0x00000000,
> + }}
> +};
> +
> struct iga64_template const iga64_code_media_block_write[] = {
> { .gen_ver = 2000, .size = 56, .code = (const uint32_t []) {
> 0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
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