[PATCH i-g-t v4 06/17] lib/gpgpu_shader: Add set/clear exception register (cr0.1) helpers

Zbigniew Kempczyński zbigniew.kempczynski at intel.com
Mon Aug 26 10:05:00 UTC 2024


On Fri, Aug 23, 2024 at 08:22:11PM +0200, Christoph Manszewski wrote:
> From: Andrzej Hajda <andrzej.hajda at intel.com>
> 
> To allow enabling and handling exceptions from shader and siplet
> proper helpers should be provided.
> 
> Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
> ---
>  lib/gpgpu_shader.c          | 28 ++++++++++++++++++++++
>  lib/gpgpu_shader.h          |  2 ++
>  lib/iga64_generated_codes.c | 48 ++++++++++++++++++++++++++++++++++++-
>  3 files changed, 77 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/gpgpu_shader.c b/lib/gpgpu_shader.c
> index 920db0be2..1616c1942 100644
> --- a/lib/gpgpu_shader.c
> +++ b/lib/gpgpu_shader.c
> @@ -628,6 +628,34 @@ void gpgpu_shader__write_dword(struct gpgpu_shader *shdr, uint32_t value,
>  	", 2, y_offset, 3, value, value, value, value);
>  }
>  
> +/**
> + * gpgpu_shader__clear_exception:
> + * @shdr: shader to be modified
> + * @value: exception bits to be cleared
> + *
> + * Clear provided bits in exception register: cr0.1 &= ~value.
> + */
> +void gpgpu_shader__clear_exception(struct gpgpu_shader *shdr, uint32_t value)
> +{
> +	emit_iga64_code(shdr, clear_exception, "		\n\
> +(W)	and (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud	\n\
> +	", ~value);
> +}
> +
> +/**
> + * gpgpu_shader__set_exception:
> + * @shdr: shader to be modified
> + * @value: exception bits to be set
> + *
> + * Set provided bits in exception register: cr0.1 |= value.
> + */
> +void gpgpu_shader__set_exception(struct gpgpu_shader *shdr, uint32_t value)
> +{
> +	emit_iga64_code(shdr, set_exception, "		\n\
> +(W)	or (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud	\n\
> +	", value);
> +}
>

LGTM:

Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>

--
Zbigniew

+
>  /**
>   * gpgpu_shader__write_on_exception:
>   * @shdr: shader to be modified
> diff --git a/lib/gpgpu_shader.h b/lib/gpgpu_shader.h
> index 76ff4989e..0bbeae66f 100644
> --- a/lib/gpgpu_shader.h
> +++ b/lib/gpgpu_shader.h
> @@ -66,6 +66,8 @@ void gpgpu_shader__common_target_write(struct gpgpu_shader *shdr,
>  				       uint32_t y_offset, const uint32_t value[4]);
>  void gpgpu_shader__common_target_write_u32(struct gpgpu_shader *shdr,
>  				     uint32_t y_offset, uint32_t value);
> +void gpgpu_shader__clear_exception(struct gpgpu_shader *shdr, uint32_t value);
> +void gpgpu_shader__set_exception(struct gpgpu_shader *shdr, uint32_t value);
>  void gpgpu_shader__end_system_routine(struct gpgpu_shader *shdr,
>  				      bool breakpoint_suppress);
>  void gpgpu_shader__end_system_routine_step_if_eq(struct gpgpu_shader *shdr,
> diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c
> index 695e921fa..b9d1f6f0a 100644
> --- a/lib/iga64_generated_codes.c
> +++ b/lib/iga64_generated_codes.c
> @@ -3,7 +3,7 @@
>  
>  #include "gpgpu_shader.h"
>  
> -#define MD5_SUM_IGA64_ASMS 872801f6be6b8c5141d85b9d5eb466cd
> +#define MD5_SUM_IGA64_ASMS ff21151a5dd5398ffc2e0404e9b6f605
>  
>  struct iga64_template const iga64_code_end_system_routine_step_if_eq[] = {
>  	{ .gen_ver = 2000, .size = 44, .code = (const uint32_t []) {
> @@ -218,6 +218,52 @@ struct iga64_template const iga64_code_write_on_exception[] = {
>  	}}
>  };
>  
> +struct iga64_template const iga64_code_set_exception[] = {
> +	{ .gen_ver = 2000, .size = 8, .code = (const uint32_t []) {
> +		0x80000966, 0x80118220, 0x02008010, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 1270, .size = 8, .code = (const uint32_t []) {
> +		0x80000966, 0x80218220, 0x02008020, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 1260, .size = 8, .code = (const uint32_t []) {
> +		0x80000966, 0x80118220, 0x02008010, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 1250, .size = 8, .code = (const uint32_t []) {
> +		0x80000966, 0x80218220, 0x02008020, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 0, .size = 8, .code = (const uint32_t []) {
> +		0x80000166, 0x80218220, 0x02008020, 0xc0ded000,
> +		0x80000101, 0x00010000, 0x00000000, 0x00000000,
> +	}}
> +};
> +
> +struct iga64_template const iga64_code_clear_exception[] = {
> +	{ .gen_ver = 2000, .size = 8, .code = (const uint32_t []) {
> +		0x80000965, 0x80118220, 0x02008010, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 1270, .size = 8, .code = (const uint32_t []) {
> +		0x80000965, 0x80218220, 0x02008020, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 1260, .size = 8, .code = (const uint32_t []) {
> +		0x80000965, 0x80118220, 0x02008010, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 1250, .size = 8, .code = (const uint32_t []) {
> +		0x80000965, 0x80218220, 0x02008020, 0xc0ded000,
> +		0x80000901, 0x00010000, 0x00000000, 0x00000000,
> +	}},
> +	{ .gen_ver = 0, .size = 8, .code = (const uint32_t []) {
> +		0x80000165, 0x80218220, 0x02008020, 0xc0ded000,
> +		0x80000101, 0x00010000, 0x00000000, 0x00000000,
> +	}}
> +};
> +
>  struct iga64_template const iga64_code_media_block_write[] = {
>  	{ .gen_ver = 2000, .size = 56, .code = (const uint32_t []) {
>  		0x80100061, 0x04054220, 0x00000000, 0x00000000,
> -- 
> 2.34.1
> 


More information about the igt-dev mailing list