[PATCH i-g-t 11/37] lib/rendercopy: Add specific support for 2:10:10:10 formats

[Juha-Pekka Heikkila]

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>

On 3.7.2024 2.27, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Use B10G10R10A2_UNORM instead of B8G8R8A8_UNORM when dealing
> with actual 10bpc pixel formats.
> 
> This is needed on tgl+ because the display hardware decompressor
> expects some magic bit shuffling to have taken place. If the
> compressor didn't do that we get garbage.
> 
> Also if the clear color is involved then the hardware needs
> to know the actual pixel format in order to correctly generate
> the native version of the clear color (which will be consumed
> by the display hardware.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>   lib/intel_bufops.h    | 2 +-
>   lib/rendercopy_gen4.c | 2 +-
>   lib/rendercopy_gen6.c | 2 +-
>   lib/rendercopy_gen7.c | 2 +-
>   lib/rendercopy_gen8.c | 2 +-
>   lib/rendercopy_gen9.c | 2 +-
>   lib/surfaceformat.h   | 8 ++++++--
>   7 files changed, 12 insertions(+), 8 deletions(-)
> 
> diff --git a/lib/intel_bufops.h b/lib/intel_bufops.h
> index 06e72ba4ba93..d111346aaa86 100644
> --- a/lib/intel_bufops.h
> +++ b/lib/intel_bufops.h
> @@ -21,7 +21,7 @@ struct intel_buf {
>   	uint32_t width;
>   	uint32_t height;
>   	uint32_t tiling;
> -	uint32_t bpp;
> +	uint32_t bpp, depth;
>   	uint32_t compression;
>   	uint32_t swizzle_mode;
>   	uint32_t yuv_semiplanar_bpp;
> diff --git a/lib/rendercopy_gen4.c b/lib/rendercopy_gen4.c
> index 8289abbabe0f..fa553765d475 100644
> --- a/lib/rendercopy_gen4.c
> +++ b/lib/rendercopy_gen4.c
> @@ -138,7 +138,7 @@ gen4_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst)
>   	ss = intel_bb_ptr_align(ibb, 32);
>   
>   	ss->ss0.surface_type = SURFACE_2D;
> -	ss->ss0.surface_format = gen4_surface_format(buf->bpp);
> +	ss->ss0.surface_format = gen4_surface_format(buf->bpp, buf->depth);
>   	ss->ss0.data_return_format = SURFACERETURNFORMAT_FLOAT32;
>   	ss->ss0.color_blend = 1;
>   
> diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c
> index 0c71bd9cbf19..233ec3bf6e85 100644
> --- a/lib/rendercopy_gen6.c
> +++ b/lib/rendercopy_gen6.c
> @@ -79,7 +79,7 @@ gen6_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst)
>   
>   	ss = intel_bb_ptr_align(ibb, 32);
>   	ss->ss0.surface_type = SURFACE_2D;
> -	ss->ss0.surface_format = gen4_surface_format(buf->bpp);
> +	ss->ss0.surface_format = gen4_surface_format(buf->bpp, buf->depth);
>   	ss->ss0.data_return_format = SURFACERETURNFORMAT_FLOAT32;
>   	ss->ss0.color_blend = 1;
>   
> diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c
> index 8fcbbc21cdd8..0cd165809b69 100644
> --- a/lib/rendercopy_gen7.c
> +++ b/lib/rendercopy_gen7.c
> @@ -76,7 +76,7 @@ gen7_bind_buf(struct intel_bb *ibb,
>   
>   	ss[0] = (SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT |
>   		 gen7_tiling_bits(buf->tiling) |
> -		 gen4_surface_format(buf->bpp) << GEN7_SURFACE_FORMAT_SHIFT);
> +		 gen4_surface_format(buf->bpp, buf->depth) << GEN7_SURFACE_FORMAT_SHIFT);
>   
>   	address = intel_bb_offset_reloc_with_delta(ibb, buf->handle,
>   						   read_domain, write_domain,
> diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
> index 28c703fca393..206af226a346 100644
> --- a/lib/rendercopy_gen8.c
> +++ b/lib/rendercopy_gen8.c
> @@ -88,7 +88,7 @@ gen8_bind_buf(struct intel_bb *ibb,
>   	ss = intel_bb_ptr_align(ibb, 64);
>   
>   	ss->ss0.surface_type = SURFACE_2D;
> -	ss->ss0.surface_format = gen4_surface_format(buf->bpp);
> +	ss->ss0.surface_format = gen4_surface_format(buf->bpp, buf->depth);
>   	ss->ss0.render_cache_read_write = 1;
>   	ss->ss0.vertical_alignment = 1; /* align 4 */
>   	ss->ss0.horizontal_alignment = 1; /* align 4 */
> diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
> index eafdf50581d3..4014100a23b5 100644
> --- a/lib/rendercopy_gen9.c
> +++ b/lib/rendercopy_gen9.c
> @@ -190,7 +190,7 @@ gen9_bind_buf(struct intel_bb *ibb, const struct intel_buf *buf, int is_dst,
>   	ss = intel_bb_ptr_align(ibb, 64);
>   
>   	ss->ss0.surface_type = SURFACE_2D;
> -	ss->ss0.surface_format = gen4_surface_format(buf->bpp);
> +	ss->ss0.surface_format = gen4_surface_format(buf->bpp, buf->depth);
>   	ss->ss0.vertical_alignment = 1; /* align 4 */
>   	ss->ss0.horizontal_alignment = 1; /* align 4 or HALIGN_32 on display ver >= 13*/
>   
> diff --git a/lib/surfaceformat.h b/lib/surfaceformat.h
> index 58ef41e6d3cd..9090d7707647 100644
> --- a/lib/surfaceformat.h
> +++ b/lib/surfaceformat.h
> @@ -186,7 +186,7 @@
>   #define SURFACE_MIPMAPLAYOUT_BELOW	0
>   #define SURFACE_MIPMAPLAYOUT_RIGHT	1
>   
> -static inline uint32_t gen4_surface_format(int bpp)
> +static inline uint32_t gen4_surface_format(int bpp, int depth)
>   {
>   	switch (bpp) {
>   	case 8:
> @@ -194,7 +194,11 @@ static inline uint32_t gen4_surface_format(int bpp)
>   	case 16:
>   		return SURFACEFORMAT_R8G8_UNORM;
>   	case 32:
> -		return SURFACEFORMAT_B8G8R8A8_UNORM;
> +		/* only needed for proper CCS handling */
> +		if (depth == 30)
> +			return SURFACEFORMAT_B10G10R10A2_UNORM;
> +		else
> +			return SURFACEFORMAT_B8G8R8A8_UNORM;
>   	case 64:
>   		return SURFACEFORMAT_R16G16B16A16_FLOAT;
>   	default: