[PATCH] tests/xe_exec_sip: increase timeout margin for tests

Andrzej Hajda andrzej.hajda at intel.com
Fri Dec 6 08:17:48 UTC 2024


In case engine reset happens 4s timeout margin sometimes is not enough
and test fails. It happens mostly on LNL/BMG due to devcoredump creation.
On CI it does not pass 5s, let's increase it to 8s to be on safe side.

Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
---
 tests/intel/xe_exec_sip_eudebug.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/intel/xe_exec_sip_eudebug.c b/tests/intel/xe_exec_sip_eudebug.c
index d056a14a2d7f..c317112b4154 100644
--- a/tests/intel/xe_exec_sip_eudebug.c
+++ b/tests/intel/xe_exec_sip_eudebug.c
@@ -263,8 +263,8 @@ static void test_sip(enum shader_type shader_type, enum sip_type sip_type,
 	debugger_enabled = xe_eudebug_debugger_available(fd);
 	vm_id = xe_vm_create(fd, debugger_enabled ? DRM_XE_VM_CREATE_FLAG_LR_MODE : 0, 0);
 
-	/* Get timeout for job, and add 4s to ensure timeout processes in subtest. */
-	timeout = xe_sysfs_get_job_timeout_ms(fd, eci) + 4ull * MSEC_PER_SEC;
+	/* Get timeout for job, and add 8s for devcoredump processing. */
+	timeout = xe_sysfs_get_job_timeout_ms(fd, eci) + 8ull * MSEC_PER_SEC;
 	timeout *= NSEC_PER_MSEC;
 	timeout *= igt_run_in_simulation() ? 10 : 1;
 

---
base-commit: e776f39da6b3666a2834f7e02a1eed9a87f21d74
change-id: 20241206-xe_exec_sip_eudebug_increase_timeout_for_devcoredump-64e46bd9721d

Best regards,
-- 
Andrzej Hajda <andrzej.hajda at intel.com>



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