[PATCH i-g-t] tests/intel/xe_mmap: fix assert_caching on small-bar
Grzegorzek, Dominik
dominik.grzegorzek at intel.com
Mon Dec 9 09:23:51 UTC 2024
On Fri, 2024-11-22 at 16:47 +0000, Matthew Auld wrote:
> Make sure we ask for DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM to avoid
> sigbus here.
>
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Matthew Brost <matthew.brost at intel.com>
That indeed should prevent sigbus.
Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek at intel.com>
> ---
> tests/intel/xe_mmap.c | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/tests/intel/xe_mmap.c b/tests/intel/xe_mmap.c
> index fc5d73d59..d818cc2f8 100644
> --- a/tests/intel/xe_mmap.c
> +++ b/tests/intel/xe_mmap.c
> @@ -207,7 +207,8 @@ static void test_small_bar(int fd)
> gem_close(fd, bo);
> }
>
> -static void assert_caching(int fd, uint64_t placement, uint16_t cpu_caching, bool fail)
> +static void assert_caching(int fd, uint64_t placement, uint32_t flags,
> + uint16_t cpu_caching, bool fail)
> {
> uint64_t size = xe_get_default_alignment(fd);
> uint64_t mmo;
> @@ -215,7 +216,7 @@ static void assert_caching(int fd, uint64_t placement, uint16_t cpu_caching, boo
> uint32_t *map;
> bool ret;
>
> - ret = __xe_bo_create_caching(fd, 0, size, placement, 0, cpu_caching, &handle);
> + ret = __xe_bo_create_caching(fd, 0, size, placement, flags, cpu_caching, &handle);
> igt_assert(ret == fail);
>
> if (fail)
> @@ -237,22 +238,26 @@ static void test_cpu_caching(int fd)
> {
> if (vram_memory(fd, 0)) {
> assert_caching(fd, vram_memory(fd, 0),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
> DRM_XE_GEM_CPU_CACHING_WC, false);
> assert_caching(fd, vram_memory(fd, 0) | system_memory(fd),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
> DRM_XE_GEM_CPU_CACHING_WC, false);
>
> assert_caching(fd, vram_memory(fd, 0),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
> DRM_XE_GEM_CPU_CACHING_WB, true);
> assert_caching(fd, vram_memory(fd, 0) | system_memory(fd),
> + DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM,
> DRM_XE_GEM_CPU_CACHING_WB, true);
> }
>
> - assert_caching(fd, system_memory(fd), DRM_XE_GEM_CPU_CACHING_WB, false);
> - assert_caching(fd, system_memory(fd), DRM_XE_GEM_CPU_CACHING_WC, false);
> + assert_caching(fd, system_memory(fd), 0, DRM_XE_GEM_CPU_CACHING_WB, false);
> + assert_caching(fd, system_memory(fd), 0, DRM_XE_GEM_CPU_CACHING_WC, false);
>
> - assert_caching(fd, system_memory(fd), -1, true);
> - assert_caching(fd, system_memory(fd), 0, true);
> - assert_caching(fd, system_memory(fd), DRM_XE_GEM_CPU_CACHING_WC + 1, true);
> + assert_caching(fd, system_memory(fd), 0, -1, true);
> + assert_caching(fd, system_memory(fd), 0, 0, true);
> + assert_caching(fd, system_memory(fd), 0, DRM_XE_GEM_CPU_CACHING_WC + 1, true);
> }
>
> igt_main
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