[PATCH i-g-t, v2 1/2] drm-uapi/xe: Add test to query GuC firmware submission version

John Harrison john.c.harrison at intel.com
Wed Feb 14 18:17:12 UTC 2024


On 2/14/2024 02:24, Francois Dugast wrote:
> This aligns with kernel commit ("drm/xe: Add uAPI to query GuC firmware
> submission version").
>
> Cc: John Harrison <John.C.Harrison at Intel.com>
> Cc: José Roberto de Souza <jose.souza at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Signed-off-by: Francois Dugast <francois.dugast at intel.com>
> ---
>   include/drm-uapi/xe_drm.h | 31 +++++++++++++
>   tests/intel/xe_query.c    | 97 +++++++++++++++++++++++++++++++++++++++
>   2 files changed, 128 insertions(+)
>
> diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h
> index bacdca787..3bd795f27 100644
> --- a/include/drm-uapi/xe_drm.h
> +++ b/include/drm-uapi/xe_drm.h
> @@ -574,6 +574,36 @@ struct drm_xe_query_engine_cycles {
>   	__u64 cpu_delta;
>   };
>   
> +/**
> + * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
> + *
> + * Given a uc_type this will return the major, minor, patch and branch version
> + * of the micro-controller firmware.
> + */
> +struct drm_xe_query_uc_fw_version {
> +	/** @uc: The micro-controller type to query firmware version */
> +#define XE_QUERY_UC_TYPE_GUC_SUBMISSION 0
> +	__u16 uc_type;
> +
> +	/** @pad: MBZ */
> +	__u16 pad;
> +
> +	/* @major_ver: major uc fw version */
> +	__u32 major_ver;
> +	/* @minor_ver: minor uc fw version */
> +	__u32 minor_ver;
> +	/* @patch_ver: patch uc fw version */
> +	__u32 patch_ver;
> +	/* @branch_ver: branch uc fw version */
> +	__u32 branch_ver;
The order is wrong here. The branch comes first.

John.

> +
> +	/** @pad2: MBZ */
> +	__u32 pad2;
> +
> +	/** @reserved: Reserved */
> +	__u64 reserved;
> +};
> +
>   /**
>    * struct drm_xe_device_query - Input of &DRM_IOCTL_XE_DEVICE_QUERY - main
>    * structure to query device information
> @@ -643,6 +673,7 @@ struct drm_xe_device_query {
>   #define DRM_XE_DEVICE_QUERY_HWCONFIG		4
>   #define DRM_XE_DEVICE_QUERY_GT_TOPOLOGY		5
>   #define DRM_XE_DEVICE_QUERY_ENGINE_CYCLES	6
> +#define DRM_XE_DEVICE_QUERY_UC_FW_VERSION	7
>   	/** @query: The type of data to query */
>   	__u32 query;
>   
> diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c
> index 9a6799c84..d51e73ea5 100644
> --- a/tests/intel/xe_query.c
> +++ b/tests/intel/xe_query.c
> @@ -730,6 +730,101 @@ static void test_engine_cycles_invalid(int fd)
>   	query_engine_cycles(fd, &ts);
>   }
>   
> +/**
> + * SUBTEST: query-uc-fw-version-guc
> + * Test category: functionality test
> + * Description: Display the GuC firmware submission version
> + *
> + * SUBTEST: multigpu-query-uc-fw-version-guc
> + * Test category: functionality test
> + * Sub-category: MultiGPU
> + * Description: Display GuC firmware submission version for all Xe devices.
> + */
> +static void
> +test_query_uc_fw_version_guc(int fd)
> +{
> +	struct drm_xe_query_uc_fw_version *uc_fw_version;
> +	struct drm_xe_device_query query = {
> +		.extensions = 0,
> +		.query = DRM_XE_DEVICE_QUERY_UC_FW_VERSION,
> +		.size = 0,
> +		.data = 0,
> +	};
> +
> +	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
> +
> +	uc_fw_version = malloc(query.size);
> +	igt_assert(uc_fw_version);
> +
> +	uc_fw_version->uc_type = XE_QUERY_UC_TYPE_GUC_SUBMISSION;
> +	uc_fw_version->pad = 0;
> +	uc_fw_version->pad2 = 0;
> +	uc_fw_version->reserved = 0;
Is it not simpler and more future proof to just do a memset(0) of the 
allocation?

> +	query.data = to_user_pointer(uc_fw_version);
> +
> +	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
> +	igt_assert(uc_fw_version->major_ver > 0);
> +
> +	igt_info("XE_QUERY_UC_TYPE_GUC_SUBMISSION %u.%u.%u.%u\n",
> +		 uc_fw_version->major_ver,
> +		 uc_fw_version->minor_ver,
> +		 uc_fw_version->patch_ver,
> +		 uc_fw_version->branch_ver);
Again, branch should come first. A change in the branch number resets 
all other components.

John.

> +
> +	free(uc_fw_version);
> +}
> +
> +/**
> + * SUBTEST: query-invalid-uc-fw-version-mbz
> + * Test category: functionality test
> + * Description: Check query with invalid arguments returns expected error code.
> + *
> + * SUBTEST: multigpu-query-invalid-uc-fw-version-mbz
> + * Test category: functionality test
> + * Sub-category: MultiGPU
> + * Description: Check query with invalid arguments for all Xe devices.
> + */
> +static void
> +test_query_uc_fw_version_invalid_mbz(int fd)
> +{
> +	struct drm_xe_query_uc_fw_version *uc_fw_version;
> +	struct drm_xe_device_query query = {
> +		.extensions = 0,
> +		.query = DRM_XE_DEVICE_QUERY_UC_FW_VERSION,
> +		.size = 0,
> +		.data = 0,
> +	};
> +
> +	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
> +
> +	uc_fw_version = malloc(query.size);
> +	igt_assert(uc_fw_version);
> +
> +	uc_fw_version->uc_type = XE_QUERY_UC_TYPE_GUC_SUBMISSION;
> +	uc_fw_version->pad = 0;
> +	uc_fw_version->pad2 = 0;
> +	uc_fw_version->reserved = 0;
> +	query.data = to_user_pointer(uc_fw_version);
> +
> +	/* Make sure the baseline passes */
> +	igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
> +
> +	/* Make sure KMD rejects non-zero padding/reserved fields */
> +	uc_fw_version->pad = -1;
> +	do_ioctl_err(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query, EINVAL);
> +	uc_fw_version->pad = 0;
> +
> +	uc_fw_version->pad2 = -1;
> +	do_ioctl_err(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query, EINVAL);
> +	uc_fw_version->pad2 = 0;
> +
> +	uc_fw_version->reserved = -1;
> +	do_ioctl_err(fd, DRM_IOCTL_XE_DEVICE_QUERY, &query, EINVAL);
> +	uc_fw_version->reserved = 0;
> +
> +	free(uc_fw_version);
> +}
> +
>   igt_main
>   {
>   	const struct {
> @@ -743,10 +838,12 @@ igt_main
>   		{ "query-hwconfig", test_query_hwconfig },
>   		{ "query-topology", test_query_gt_topology },
>   		{ "query-cs-cycles", test_query_engine_cycles },
> +		{ "query-uc-fw-version-guc", test_query_uc_fw_version_guc },
>   		{ "query-invalid-cs-cycles", test_engine_cycles_invalid },
>   		{ "query-invalid-query", test_query_invalid_query },
>   		{ "query-invalid-size", test_query_invalid_size },
>   		{ "query-invalid-extension", test_query_invalid_extension },
> +		{ "query-invalid-uc-fw-version-mbz", test_query_uc_fw_version_invalid_mbz },
>   		{ }
>   	}, *f;
>   	int xe, gpu_count;



More information about the igt-dev mailing list