[PATCH i-g-t] tests/intel/xe_pm: Test to validate vm bind functionality with suspend and resume.

sai.gowtham.ch at intel.com sai.gowtham.ch at intel.com
Fri Feb 23 06:51:36 UTC 2024


From: Sai Gowtham Ch <sai.gowtham.ch at intel.com>

Test validates vm bind functionality, by suspend and resuming the device
before and after binding VM to a VA.

Signed-off-by: Sai Gowtham Ch <sai.gowtham.ch at intel.com>
---
 tests/intel/xe_pm.c | 92 +++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 92 insertions(+)

diff --git a/tests/intel/xe_pm.c b/tests/intel/xe_pm.c
index a0045da0b..f9d2ce421 100644
--- a/tests/intel/xe_pm.c
+++ b/tests/intel/xe_pm.c
@@ -550,9 +550,96 @@ static void test_mmap(device_t device, uint32_t placement, uint32_t flags)
 	close(fw_handle);
 }
 
+/**
+ * SUBTEST: vm-bind
+ * Description: Validate vm bind functionality with suspend and resume
+ * Functionality: pm
+ * Run type: FULL
+ */
+static void vm_bind(device_t device, struct drm_xe_engine_class_instance *eci)
+{
+	struct drm_xe_sync sync = {
+		.type = DRM_XE_SYNC_TYPE_SYNCOBJ,
+		.flags = DRM_XE_SYNC_FLAG_SIGNAL,
+	};
+	struct drm_xe_exec exec = {
+		.num_batch_buffer = 1,
+		.num_syncs = 1,
+		.syncs = to_user_pointer(&sync),
+	};
+	struct data {
+		uint32_t batch[16];
+		uint32_t data;
+		uint64_t addr;
+	} *data;
+	uint32_t vm;
+	uint32_t exec_queue;
+	uint32_t bind_engine;
+	uint32_t syncobj;
+	size_t bo_size;
+	int value = 0x123456;
+	uint64_t addr = 0x100000;
+	uint32_t bo = 0;
+	int b = 0;
+	uint64_t batch_offset = (char *)&(data->batch) - (char *)data;
+	uint64_t batch_addr = addr + batch_offset;
+	uint64_t sdi_offset = (char *)&(data->data) - (char *)data;
+	uint64_t sdi_addr = addr + sdi_offset;
+
+	syncobj = syncobj_create(device.fd_xe, 0);
+	sync.handle = syncobj;
+
+	vm = xe_vm_create(device.fd_xe, 0, 0);
+	bo_size = sizeof(*data);
+	bo_size = xe_bb_size(device.fd_xe, bo_size);
+
+	bo = xe_bo_create(device.fd_xe, vm, bo_size,
+			  vram_if_possible(device.fd_xe, eci->gt_id),
+			  DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+
+	exec_queue = xe_exec_queue_create(device.fd_xe, vm, eci, 0);
+	bind_engine = xe_bind_exec_queue_create(device.fd_xe, vm, 0);
+	xe_vm_bind_async(device.fd_xe, vm, bind_engine, bo, 0, addr, bo_size, &sync, 1);
+	igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE);
+	data = xe_bo_map(device.fd_xe, bo, bo_size);
+
+	b = 0;
+	data->batch[b++] = MI_STORE_DWORD_IMM_GEN4;
+	data->batch[b++] = sdi_addr;
+	data->batch[b++] = sdi_addr >> 32;
+	data->batch[b++] = value;
+	data->batch[b++] = MI_BATCH_BUFFER_END;
+	igt_assert(b <= ARRAY_SIZE(data->batch));
+
+	exec.exec_queue_id = exec_queue;
+	exec.address = batch_addr;
+	sync.flags &= DRM_XE_SYNC_FLAG_SIGNAL;
+	xe_exec(device.fd_xe, &exec);
+
+	igt_assert(syncobj_wait(device.fd_xe, &syncobj, 1, INT64_MAX, 0, NULL));
+	igt_assert_eq(data->data, value);
+	igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE);
+
+	exec.exec_queue_id = exec_queue;
+	exec.address = batch_addr;
+	sync.flags &= DRM_XE_SYNC_FLAG_SIGNAL;
+	xe_exec(device.fd_xe, &exec);
+
+	igt_assert(syncobj_wait(device.fd_xe, &syncobj, 1, INT64_MAX, 0, NULL));
+	igt_assert_eq(data->data, value);
+
+	syncobj_destroy(device.fd_xe, syncobj);
+	munmap(data, bo_size);
+	gem_close(device.fd_xe, bo);
+
+	xe_exec_queue_destroy(device.fd_xe, exec_queue);
+	xe_vm_destroy(device.fd_xe, vm);
+}
+
 igt_main
 {
 	struct drm_xe_engine_class_instance *hwe;
+	struct drm_xe_engine *engine;
 	device_t device;
 	uint32_t d3cold_allowed;
 	int sysfs_fd;
@@ -693,6 +780,11 @@ igt_main
 		}
 	}
 
+	igt_subtest("vm-bind") {
+		engine = xe_engine(device.fd_xe, 1);
+		vm_bind(device, &engine->instance);
+	}
+
 	igt_fixture {
 		close(sysfs_fd);
 		igt_pm_set_d3cold_allowed(device.pci_slot_name, d3cold_allowed);
-- 
2.39.1



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