[PATCH i-g-t 1/2] tests/intel/gem_spin_batch: Skip compute engines on MTL due to w/a

[John.C.Harrison at Intel.com]

From: johnharr <johnharr at invalid-email.com>

There is a w/a on MTL that prevents concurrent execution of multiple
processes on RCS and CCS. The 'spin-all-new' test is explicitly
testing such execution across all engines. So either the entire test
must be skipped on MTL or just the compute engine must be skipped. Do
the latter as that at least leaves some test coverage in place.

Signed-off-by: John Harrison <John.C.Harrison at Intel.com>
---
 tests/intel/gem_spin_batch.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/tests/intel/gem_spin_batch.c b/tests/intel/gem_spin_batch.c
index ec1458e35197..a0f35b23c718 100644
--- a/tests/intel/gem_spin_batch.c
+++ b/tests/intel/gem_spin_batch.c
@@ -214,6 +214,19 @@ spin_on_all_engines(int fd, const intel_ctx_t *ctx,
 	igt_waitchildren();
 }
 
+/*
+ * Wa_14019159160:
+ * An RCS/CCS workaround on MTL means that contexts from different address spaces
+ * cannot run in parallel, they must be timesliced. However, a non-preemptible
+ * spinner cannot be timesliced. Thus the PARALLEL_SPIN_NEW_CTX test cannot be run
+ * across both RCS and CCS engines, one or other must be skipped for the test to
+ * not hit a heartbeat timeout and be killed.
+ */
+static bool skip_bad_engine(int fd, const struct intel_execution_engine2 *e)
+{
+	return IS_METEORLAKE(intel_get_drm_devid(fd)) && (e->class == I915_ENGINE_CLASS_COMPUTE);
+}
+
 static void spin_all(int i915, const intel_ctx_t *ctx, unsigned int flags)
 #define PARALLEL_SPIN_NEW_CTX BIT(0)
 {
@@ -230,6 +243,9 @@ static void spin_all(int i915, const intel_ctx_t *ctx, unsigned int flags)
 		if (gem_engine_can_block_ggtt_binder(i915, e))
 			continue;
 
+		if (skip_bad_engine(i915, e))
+			continue;
+
 		if (flags & PARALLEL_SPIN_NEW_CTX)
 			ctx = intel_ctx_create(i915, &cfg);
 		ahnd = get_reloc_ahnd(i915, ctx->id);
-- 
2.43.0