[PATCH i-g-t] lib/intel_batchbuffer: Extend requested size by 4K for Xe2+

[Zbigniew Kempczyński]

Due to batch prefetching on Xe2+ lets add implicitly 4K page
to user requested batch size. Such should protect the user from
being affected by CAT errors when hw will touch offsets after
user requested batch size.

Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
Cc: Matthew Auld <matthew.auld at intel.com>
---
 lib/intel_batchbuffer.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 85023f9e6f..1596e95427 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -959,6 +959,11 @@ __intel_bb_create(int fd, uint32_t ctx, uint32_t vm, const intel_ctx_cfg_t *cfg,
 			alignment = xe_get_default_alignment(fd);
 
 		ibb->alignment = alignment;
+
+		/* Xe2+ hw requires additional page due to prefetching */
+		if (AT_LEAST_GEN(intel_get_drm_devid(ibb->fd), 20))
+			size += SZ_4K;
+
 		size = ALIGN(size, ibb->alignment);
 		ibb->handle = xe_bo_create(fd, 0, size, vram_if_possible(fd, 0),
 					   DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
-- 
2.34.1