[PATCH i-g-t] tests/kms_vrr: Reset to High refresh rate before begin drrs test

Modem, Bhanuprakash bhanuprakash.modem at intel.com
Thu Jan 25 09:56:43 UTC 2024


Hi Vidya,

On 25-01-2024 02:59 pm, Vidya Srinivas wrote:
> Sink with DRRS and VRR can be in downclock mode,
> so switch to High clock mode as test preparation.
> 
> Signed-off-by: Vidya Srinivas <vidya.srinivas at intel.com>
> ---
>   tests/kms_vrr.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c
> index 44bc3480d..697697b4e 100644
> --- a/tests/kms_vrr.c
> +++ b/tests/kms_vrr.c
> @@ -522,6 +522,14 @@ test_seamless_rr_basic(data_t *data, enum pipe pipe, igt_output_t *output, uint3
>   
>   	if (vrr)
>   		set_vrr_on_pipe(data, pipe, false, true);
> +	else {
> +		/*
> +		 Sink with DRRS and VRR can be in downclock mode.
> +		 so switch to High clock mode as test preparation

Please use proper commenting style:

Example:
/* This is single line comment. */

/*
  * This is multiline
  * comment.
  */

No need to float the new rev, please fix this while merging the patch.

Reviewed-by: Bhanuprakash Modem <bhanuprakash.modem at intel.com>

- Bhanu

> +		*/
> +		igt_output_override_mode(output, &data->switch_modes[HIGH_RR_MODE]);
> +		igt_assert(igt_display_try_commit_atomic(&data->display, DRM_MODE_PAGE_FLIP_EVENT, NULL) == 0);
> +	}
>   
>   	rate = vtest_ns.max;
>   	result = flip_and_measure(data, output, pipe, rate, TEST_DURATION_NS);


More information about the igt-dev mailing list