[PATCH] lib/gpgpu_shader: add support for PVC and MTL

Andrzej Hajda andrzej.hajda at intel.com
Fri Jul 26 13:21:47 UTC 2024


PVC reports graphic version 12.60, which surprisingly maps to platform
12p72 in iga64, MTL maps 12.70 -> 12p71.

Signed-off-by: Andrzej Hajda <andrzej.hajda at intel.com>
---
 lib/iga64_generated_codes.c  | 29 +++++++++++++++++++++++++++--
 scripts/generate_iga64_codes |  2 +-
 2 files changed, 28 insertions(+), 3 deletions(-)

diff --git a/lib/iga64_generated_codes.c b/lib/iga64_generated_codes.c
index f609ad711b4b..6a08c4844cf0 100644
--- a/lib/iga64_generated_codes.c
+++ b/lib/iga64_generated_codes.c
@@ -22,7 +22,23 @@ struct iga64_template const iga64_code_media_block_write[] = {
 		0x80000001, 0x00010000, 0x30000000, 0x00000000,
 		0x80000901, 0x00010000, 0x00000000, 0x00000000,
 	}},
-	{ .gen_ver = 1272, .size = 52, .code = (const uint32_t []) {
+	{ .gen_ver = 1270, .size = 56, .code = (const uint32_t []) {
+		0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
+		0x80000061, 0x05254220, 0x00000000, 0xc0ded004,
+		0x80000061, 0x05454220, 0x00000000, 0xc0ded005,
+		0x80000061, 0x05654220, 0x00000000, 0xc0ded006,
+		0x80000069, 0x04058220, 0x02000024, 0xc0ded000,
+		0x80000061, 0x04250220, 0x000000c4, 0x00000000,
+		0x80001940, 0x04258220, 0x02000424, 0xc0ded001,
+		0x80000061, 0x04454220, 0x00000000, 0xc0ded002,
+		0x80000061, 0x04850220, 0x000000a4, 0x00000000,
+		0x80001901, 0x00010000, 0x00000000, 0x00000000,
+		0x80044031, 0x00000000, 0xc0000414, 0x02a00000,
+		0x80000001, 0x00010000, 0x20000000, 0x00000000,
+		0x80000001, 0x00010000, 0x30000000, 0x00000000,
+		0x80000901, 0x00010000, 0x00000000, 0x00000000,
+	}},
+	{ .gen_ver = 1260, .size = 52, .code = (const uint32_t []) {
 		0x80000061, 0x05054220, 0x00000000, 0xc0ded003,
 		0x80000061, 0x05154220, 0x00000000, 0xc0ded004,
 		0x80000061, 0x05254220, 0x00000000, 0xc0ded005,
@@ -71,7 +87,16 @@ struct iga64_template const iga64_code_media_block_write[] = {
 };
 
 struct iga64_template const iga64_code_eot[] = {
-	{ .gen_ver = 1272, .size = 8, .code = (const uint32_t []) {
+	{ .gen_ver = 2000, .size = 8, .code = (const uint32_t []) {
+		0x800c0061, 0x70050220, 0x00460005, 0x00000000,
+		0x800f2031, 0x00000004, 0x3000700c, 0x00000000,
+	}},
+	{ .gen_ver = 1270, .size = 12, .code = (const uint32_t []) {
+		0x80030061, 0x70050220, 0x00460005, 0x00000000,
+		0x80001901, 0x00010000, 0x00000000, 0x00000000,
+		0x80034031, 0x00000004, 0x3000700c, 0x00000000,
+	}},
+	{ .gen_ver = 1260, .size = 8, .code = (const uint32_t []) {
 		0x800c0061, 0x70050220, 0x00460005, 0x00000000,
 		0x800f2031, 0x00000004, 0x3000700c, 0x00000000,
 	}},
diff --git a/scripts/generate_iga64_codes b/scripts/generate_iga64_codes
index 3d114ea0e119..d1e40b600ec0 100755
--- a/scripts/generate_iga64_codes
+++ b/scripts/generate_iga64_codes
@@ -7,7 +7,7 @@
 # to minimal GPU generation supported by platform multiplied by 100 and platform
 # is one of platforms supported by -p switch of iga64.
 # Must be in decreasing order, the last one must have gen100 equal 0.
-GEN_VERSIONS="2000:2 1272:12p72 1250:12p5 0:12p1"
+GEN_VERSIONS="2000:2 1270:12p71 1260:12p72 1250:12p5 0:12p1"
 
 # Magic values to encode asm template args, must be the the same as in gpgpu_shader.c.
 IGA64_ARG0=0xc0ded000

---
base-commit: c7aacce8a079574e2151441761308b0f759622c3
change-id: 20240726-gpgpu_add_pvc_mtl-24c7dbd8a70a

Best regards,
-- 
Andrzej Hajda <andrzej.hajda at intel.com>



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