[PATCH 42/66] tests/xe_exec_sip: Add breakpoint-writesip-twice test

Christoph Manszewski christoph.manszewski at intel.com
Mon Jul 29 16:01:35 UTC 2024


From: Dominik Karol Piątkowski <dominik.karol.piatkowski at intel.com>

Add breakpoint-writesip-twice test that checks twice if
we enter SIP after hitting breakpoint in shader.

Signed-off-by: Dominik Karol Piątkowski <dominik.karol.piatkowski at intel.com>
Cc: Karolina Stolarek <karolina.stolarek at intel.com>
---
 tests/intel/xe_exec_sip.c | 40 ++++++++++++++++++++++++---------------
 1 file changed, 25 insertions(+), 15 deletions(-)

diff --git a/tests/intel/xe_exec_sip.c b/tests/intel/xe_exec_sip.c
index 832c26bac..7b4305576 100644
--- a/tests/intel/xe_exec_sip.c
+++ b/tests/intel/xe_exec_sip.c
@@ -42,6 +42,8 @@
 #define SIP_NULL 4
 #define SIP_WAIT 5
 
+#define F_SUBMIT_TWICE	(1 << 0)
+
 static struct intel_buf *
 create_fill_buf(int fd, int width, int height, uint8_t color)
 {
@@ -259,11 +261,14 @@ xe_sysfs_get_job_timeout_ms(int fd, struct drm_xe_engine_class_instance *eci)
  * SUBTEST: breakpoint-writesip
  * Description: Test that we enter SIP after hitting breakpoint in shader.
  *
+ * SUBTEST: breakpoint-writesip-twice
+ * Description: Test twice that we enter SIP after hitting breakpoint in shader.
+ *
  * SUBTEST: breakpoint-waitsip
  * Description: Test that we reset after seeing the attention without the debugger.
  *
  */
-static void test_sip(int shader, int sip, struct drm_xe_engine_class_instance *eci)
+static void test_sip(int shader, int sip, struct drm_xe_engine_class_instance *eci, uint32_t flags)
 {
 	unsigned int threads = 512;
 	unsigned int height = max_t(threads, HEIGHT, threads * 2);
@@ -274,6 +279,7 @@ static void test_sip(int shader, int sip, struct drm_xe_engine_class_instance *e
 		.value = DRM_XE_EXEC_QUEUE_EUDEBUG_FLAG_ENABLE,
 	};
 	struct timespec ts = { };
+	int done = 0;
 	uint32_t exec_queue_id, handle, vm_id;
 	struct intel_bb *ibb;
 	uint64_t timeout;
@@ -284,7 +290,6 @@ static void test_sip(int shader, int sip, struct drm_xe_engine_class_instance *e
 	fd = drm_open_driver(DRIVER_XE);
 	xe_device_get(fd);
 
-
 	vm_id = xe_vm_create(fd, 0, 0);
 
 	/* Get timeout for job, and add 4s to ensure timeout processes in subtest. */
@@ -295,19 +300,21 @@ static void test_sip(int shader, int sip, struct drm_xe_engine_class_instance *e
 	exec_queue_id = xe_exec_queue_create(fd, vm_id, eci,
 					     xe_eudebug_debugger_available(fd) ?
 					     to_user_pointer(&ext) : 0);
-	ibb = intel_bb_create_with_context(fd, exec_queue_id, vm_id, NULL, 4096);
+	do {
+		ibb = intel_bb_create_with_context(fd, exec_queue_id, vm_id, NULL, 4096);
 
-	igt_nsec_elapsed(&ts);
-	handle = gpgpu_shader(fd, ibb, shader, sip, threads, width, height);
+		igt_nsec_elapsed(&ts);
+		handle = gpgpu_shader(fd, ibb, shader, sip, threads, width, height);
 
-	intel_bb_sync(ibb);
-	igt_assert_lt_u64(igt_nsec_elapsed(&ts), timeout);
+		intel_bb_sync(ibb);
+		igt_assert_lt_u64(igt_nsec_elapsed(&ts), timeout);
 
-	dispatched = check_buf(fd, handle, width, height, sip, COLOR_C4);
-	check_usercoredump(fd, sip, dispatched);
+		dispatched = check_buf(fd, handle, width, height, sip, COLOR_C4);
+		check_usercoredump(fd, sip, dispatched);
 
-	gem_close(fd, handle);
-	intel_bb_destroy(ibb);
+		gem_close(fd, handle);
+		intel_bb_destroy(ibb);
+	} while (!done++ && (flags & F_SUBMIT_TWICE));
 
 	xe_exec_queue_destroy(fd, exec_queue_id);
 	xe_vm_destroy(fd, vm_id);
@@ -333,7 +340,7 @@ igt_main
 		fd = drm_open_driver(DRIVER_XE);
 
 	test_render_and_compute("sanity", fd, eci)
-		test_sip(SHADER_WRITE, SIP_NULL, eci);
+		test_sip(SHADER_WRITE, SIP_NULL, eci, 0);
 
 	/* Debugger disabled (TD_CTL not set) */
 	igt_subtest_group {
@@ -343,7 +350,7 @@ igt_main
 		}
 
 		test_render_and_compute("wait-writesip-nodebug", fd, eci)
-			test_sip(SHADER_WAIT, SIP_WRITE, eci);
+			test_sip(SHADER_WAIT, SIP_WRITE, eci, 0);
 
 		igt_fixture
 			xe_eudebug_enable(fd, was_enabled);
@@ -356,10 +363,13 @@ igt_main
 		}
 
 		test_render_and_compute("breakpoint-writesip", fd, eci)
-			test_sip(SHADER_BREAKPOINT, SIP_WRITE, eci);
+			test_sip(SHADER_BREAKPOINT, SIP_WRITE, eci, 0);
+
+		test_render_and_compute("breakpoint-writesip-twice", fd, eci)
+			test_sip(SHADER_BREAKPOINT, SIP_WRITE, eci, F_SUBMIT_TWICE);
 
 		test_render_and_compute("breakpoint-waitsip", fd, eci)
-			test_sip(SHADER_BREAKPOINT, SIP_WAIT, eci);
+			test_sip(SHADER_BREAKPOINT, SIP_WAIT, eci, 0);
 
 		igt_fixture
 			xe_eudebug_enable(fd, was_enabled);
-- 
2.34.1



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