[PATCH i-g-t] tests/intel/xe_exec_store: Add basic_inst_benchmark
Nirmoy Das
nirmoy.das at intel.com
Tue Jun 18 17:20:21 UTC 2024
Add basic_inst_benchmark to benchmark this basic operation
for BO sizes to get basic understanding how long it takes
bind a BO and run simple GPU command on it.
This not a CI test but rather for developer to identify various
bottleneck/regression in BO binding.
Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
---
tests/intel/xe_exec_store.c | 102 ++++++++++++++++++++++++++++++------
1 file changed, 85 insertions(+), 17 deletions(-)
diff --git a/tests/intel/xe_exec_store.c b/tests/intel/xe_exec_store.c
index c872c22d5..5890faf14 100644
--- a/tests/intel/xe_exec_store.c
+++ b/tests/intel/xe_exec_store.c
@@ -93,15 +93,10 @@ static void persistance_batch(struct data *data, uint64_t addr)
data->addr = batch_addr;
}
-/**
- * SUBTEST: basic-store
- * Description: Basic test to verify store dword.
- * SUBTEST: basic-cond-batch
- * Description: Basic test to verify cond batch end instruction.
- * SUBTEST: basic-all
- * Description: Test to verify store dword on all available engines.
- */
-static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instance *eci)
+
+static void basic_inst_size(int fd, int inst_type,
+ struct drm_xe_engine_class_instance *eci,
+ uint16_t cpu_caching, size_t bo_size)
{
struct drm_xe_sync sync[2] = {
{ .type = DRM_XE_SYNC_TYPE_SYNCOBJ, .flags = DRM_XE_SYNC_FLAG_SIGNAL, },
@@ -117,7 +112,6 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
uint32_t exec_queue;
uint32_t bind_engine;
uint32_t syncobj;
- size_t bo_size;
int value = 0x123456;
uint64_t addr = 0x100000;
uint32_t bo = 0;
@@ -127,12 +121,10 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
sync[1].handle = syncobj;
vm = xe_vm_create(fd, 0, 0);
- bo_size = sizeof(*data);
- bo_size = xe_bb_size(fd, bo_size);
- bo = xe_bo_create(fd, vm, bo_size,
+ bo = xe_bo_create_caching(fd, vm, bo_size,
vram_if_possible(fd, eci->gt_id),
- DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM);
+ DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM, cpu_caching);
exec_queue = xe_exec_queue_create(fd, vm, eci, 0);
bind_engine = xe_bind_exec_queue_create(fd, vm, 0);
@@ -167,6 +159,66 @@ static void basic_inst(int fd, int inst_type, struct drm_xe_engine_class_instanc
xe_vm_destroy(fd, vm);
}
+
+/**
+ * SUBTEST: basic-store
+ * Description: Basic test to verify store dword.
+ * SUBTEST: basic-cond-batch
+ * Description: Basic test to verify cond batch end instruction.
+ * SUBTEST: basic-all
+ * Description: Test to verify store dword on all available engines.
+ */
+static void basic_inst(int fd, int inst_type,
+ struct drm_xe_engine_class_instance *eci,
+ uint16_t cpu_caching)
+{
+ size_t bo_size;
+
+ bo_size = sizeof(struct data);
+ bo_size = xe_bb_size(fd, bo_size);
+
+ basic_inst_size(fd, inst_type, eci, cpu_caching, bo_size);
+}
+
+/**
+ * SUBTEST: basic-store-benchmark
+ * Description: Basic test to verify time taken for doing store dword with various size.
+ */
+static void basic_inst_benchmark(int fd, int inst_type,
+ struct drm_xe_engine_class_instance *eci,
+ uint16_t cpu_caching)
+{
+ struct {
+ size_t size;
+ const char *name;
+ } sizes[] = {
+ {SZ_4K, "SZ_4K"},
+ {SZ_2M, "SZ_2M"},
+ {SZ_64M, "SZ_64M"},
+ {SZ_128M, "SZ_128M"},
+ {SZ_256M, "SZ_256M"},
+ {SZ_1G, "SZ_1G"}
+ };
+
+ struct timeval start, end;
+ long seconds, useconds, mtime;
+
+ for (size_t i = 0; i < ARRAY_SIZE(sizes); ++i) {
+ size_t bo_size = sizes[i].size;
+ const char *size_name = sizes[i].name;
+
+ gettimeofday(&start, NULL);
+ basic_inst_size(fd, inst_type, eci, cpu_caching, bo_size);
+ gettimeofday(&end, NULL);
+
+ seconds = end.tv_sec - start.tv_sec;
+ useconds = end.tv_usec - start.tv_usec;
+ mtime = ((seconds) * 1000 + useconds / 1000.0) + 0.5;
+
+ igt_info("Time taken for size %s: %ld ms\n", size_name, mtime);
+ }
+}
+
#define PAGES 1
#define NCACHELINES (4096/64)
/**
@@ -342,12 +394,28 @@ igt_main
igt_subtest("basic-store") {
engine = xe_engine(fd, 1);
- basic_inst(fd, STORE, &engine->instance);
+ basic_inst(fd, COND_BATCH, &engine->instance, DRM_XE_GEM_CPU_CACHING_WB);
+ }
+
+ igt_subtest_with_dynamic("basic-store-benchmark") {
+ struct dyn {
+ const char *name;
+ int cache;
+ } tests[] = {
+ {"WC", DRM_XE_GEM_CPU_CACHING_WC},
+ {"WB", DRM_XE_GEM_CPU_CACHING_WB}
+ };
+
+ for (int i = 0; i < ARRAY_SIZE(tests); i++) {
+ igt_dynamic_f("%s", tests[i].name);
+ engine = xe_engine(fd, 1);
+ basic_inst_benchmark(fd, STORE, &engine->instance, tests[i].cache);
+ }
}
igt_subtest("basic-cond-batch") {
engine = xe_engine(fd, 1);
- basic_inst(fd, COND_BATCH, &engine->instance);
+ basic_inst(fd, COND_BATCH, &engine->instance, DRM_XE_GEM_CPU_CACHING_WB);
}
igt_subtest_with_dynamic("basic-all") {
@@ -356,7 +424,7 @@ igt_main
xe_engine_class_string(hwe->engine_class),
hwe->engine_instance,
hwe->gt_id);
- basic_inst(fd, STORE, hwe);
+ basic_inst(fd, STORE, hwe, DRM_XE_GEM_CPU_CACHING_WB);
}
}
--
2.42.0
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